SNVSCV4 September 2024 LM3645
PRODUCTION DATA
When the TOR/TX pin is configured for use as a hardware controlled torch enable (bits [7:6] in reg 0x01), all outputs assigned to Torch Mode in the Diode Mode Register (bits [7:0] in reg 0x02) will be enabled or disabled via the external pin.
If configured to the Torch configuration, it is recommended that the TOR/TX pin be held low before enabling the outputs assigned to Torch Mode.
TOR EN | TOR/TX Mode | TOR PIN | Dx Mode | Action |
---|---|---|---|---|
0 | X | 0 | Off | Off |
0 | X | X | Torch | Torch, I2C Controlled |
1 | 0 | X | Torch | Torch, I2C Controlled |
1 | 1 | 0 | Torch | Off |
1 | 1 | 1 | Torch | Externally Enabled Torch Mode |