SNVSCV4 September   2024 LM3645

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Amplifier Synchronization (TORCH/TX)
      2. 6.3.2 Input Voltage Flash Monitor (IVFM)
      3. 6.3.3 Fault/Protections
        1. 6.3.3.1  Fault Operation
        2. 6.3.3.2  Flash Time-Out
        3. 6.3.3.3  Overvoltage Protection (OVP)
        4. 6.3.3.4  Current Limit
        5. 6.3.3.5  NTC Thermistor Input/Outputs (TEMP1, TEMP2)
        6. 6.3.3.6  Thermal Scale Back
        7. 6.3.3.7  Thermal Shutdown (TSD)
        8. 6.3.3.8  Undervoltage Lockout (UVLO)
        9. 6.3.3.9  LED and/or VOUT Short Fault
        10. 6.3.3.10 Fault Behavior Table
    4. 6.4 Device Functioning Modes
      1. 6.4.1 Flash Mode
      2. 6.4.2 Torch Mode
      3. 6.4.3 IR Mode
      4. 6.4.4 Voltage Mode
      5. 6.4.5 Mode Transitions
      6. 6.4.6 Boost Operation
        1. 6.4.6.1 Start-Up (Enabling The Device)
        2. 6.4.6.2 Pass Mode
        3. 6.4.6.3 Output Voltage Regulation
    5. 6.5 Programming and Control
      1. 6.5.1 Dx_EN Bits
      2. 6.5.2 STR1 and STR2 Usage
      3. 6.5.3 TOR/TX Usage
      4. 6.5.4 Control State Diagram
      5. 6.5.5 I2C-Compatible Interface
        1. 6.5.5.1 Data Validity
        2. 6.5.5.2 Start and Stop Conditions
        3. 6.5.5.3 Transferring Data
        4. 6.5.5.4 I2C-Compatible Chip Address
    6. 6.6 Register Descriptions
      1. 6.6.1 MainReg Registers
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Output Control Examples
        1. 7.2.2.1 Four Channel Flash with Strobe1 Trigger Starting in Standby
        2. 7.2.2.2 Four Channel Flash with Strobe1 Trigger Starting in I2C Torch
        3. 7.2.2.3 Mixed Mode Functionality
        4. 7.2.2.4 Voltage Mode Only
        5. 7.2.2.5 Voltage Mode With Advanced IR
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Snubber Requirement
        2. 7.2.3.2 Output Capacitor Selection
        3. 7.2.3.3 Input Capacitor Selection
        4. 7.2.3.4 Inductor Selection
      4. 7.2.4 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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Layout Guidelines

The high switching frequency and large switching currents of the LM3645 make the choice of layout important. Follow these guidelines to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range.

  • Place CIN on the top layer (same layer as the LM3645) and as close to the device as possible. The input capacitor conducts the driver currents during the low-side MOSFET turn-on and turn-off and can detect current spikes over 1 A in amplitude. Connecting the input capacitor through short, wide traces to both the IN and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the VIN line.
  • Place COUT on the top layer (same layer as the LM3645) and as close as possible to the OUT and GND pin. The returns for both CIN and COUT should come together at one point, as close to the GND pin as possible. Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND pins that can corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding circuitry.
  • Connect the inductor on the top layer close to the SW pin. There should be a low-impedance connection from the inductor to SW due to the large DC inductor current, and at the same time the area occupied by the SW node should be small so as to reduce the capacitive coupling of the high dV/dT present at SW that can couple into nearby traces.
  • Avoid routing logic traces near the SW node so as to avoid any capacitively coupled voltages from SW onto any high-impedance logic lines such as TOR/Tx, STR1, STR2, EN, SDA, and SCL. A good approach is to insert an inner layer GND plane underneath the SW node and between any nearby routed traces. This creates a shield from the electric field generated at SW.
  • Terminate the Flash LED cathodes directly to the GND pin of the LM3645. If possible, route the LED returns with a dedicated path so as to keep the high amplitude LED currents out of the GND plane. For Flash LEDs that are routed relatively far away from the LM3645, a good approach is to sandwich the forward and return current paths over the top of each other on two layers. This helps reduce the inductance of the LED current paths.