SNVS555D January   2008  – December 2014 LM3881

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Timing
      2. 7.3.2 Enable Circuit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up with EN Pin
      2. 7.4.2 Power Down with EN Pin
      3. 7.4.3 Noninverted Output Mode
      4. 7.4.4 Inverted Output Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Open-Drain Flags Pullup
      2. 8.1.2 Enable the Device
      3. 8.1.3 Timing Adjust
    2. 8.2 Typical Application
      1. 8.2.1 Simple Sequencing of Three Power Supplies
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Sequencing Using Independent Flag Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted) (1)(2)
MIN MAX UNIT
VCC, EN, INV, TADJ, FLAG1, FLAG2, FLAG3 to GND –0.3 6.0 V
Junction Temperature 150 °C
Lead Temperature (Soldering, 5 s) 260 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

6.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) 2 kV
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC to GND 2.7 5.5 V
EN, INV, TADJ, FLAG1, FLAG2, FLAG3 to GND –0.3 VCC + 0.3 V
Junction Temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LM3881 UNIT
DGK
8 PINS
RθJA Junction-to-ambient thermal resistance 224.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 107.6
RθJB Junction-to-board thermal resistance 145.3
ψJT Junction-to-top characterization parameter 31.8
ψJB Junction-to-board characterization parameter 143.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted). Minimum and Maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C and are provided for reference purposes only. TJ = –40°C to +125°C, VCC = 3.3 V, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
IQ Operating Quiescent Current 80 110 µA
OPEN-DRAIN FLAGS
IFLAG FLAGx Leakage Current VFLAGx = 3.3 V 0.001 1 µA
VOL FLAGx Output Voltage Low IFLAGx = 1.2 mA 0.4 V
TIME DELAYS
ITADJ_SRC TADJ Source Current 4 12 20 µA
ITADJ_SNK TADJ Sink Current 4 12 20 µA
VHTH High Threshold Level 1.0 1.22 1.4 V
VLTH Low Threshold Level 0.3 0.5 0.7 V
TCLK Clock Cycle CADJ = 10 nF 1.2 ms
TD1, TD4 Flag Time Delay 9 10 Clock cycles
TD2, TD3, TD5, TD6 Flag Time Delay 8 Clock cycles
ENABLE PIN
VEN EN Pin Threshold 1.0 1.22 1.5 V
IEN EN Pin Pullup Current VEN = 0 V 7 µA
INV PIN
VIH_INV Invert Pin VIH 90% VCC V
VIL_INV Invert Pin VIL 10% VCC V
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.

6.6 Typical Characteristics

VCC = 3.3 V unless otherwise specified.
30048414.gif
Figure 1. Quiescent Current vs VCC
30048416.gif
Figure 3. Enable Threshold vs Temperature
30048418.gif
Figure 5. Time Delay vs Temperature (CADJ = 10 nF Nominal)
30048420.gif
Figure 7. FLAG Voltage vs Current
30048415.gif
Figure 2. Quiescent Current vs Temperature
30048417.gif
Figure 4. Time Delay vs VIN (CADJ = 10 nF Nominal)
30048419.gif
Figure 6. VFLAG vs VIN (INV Low, RFLAG = 100 kΩ)
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