ZHCSCW5B August 2014 – September 2017 LM43600
PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
The LM43600 has a built-in power-good flag shown on PGOOD pin to indicate whether the output voltage is within its regulation level. The PGOOD signal can be used for start-up sequencing of multiple rails or fault protection. The PGOOD pin is an open-drain output that requires a pullup resistor to an appropriate DC voltage. Voltage seen by the PGOOD pin should never exceed 12 V. A resistor divider pair can be used to divide the voltage down from a higher potential. A typical range of pullup resistor value is 10 kΩ to 100 kΩ.
When the FB voltage is within the power-good band, +4% above and -4% below the internal reference VREF typically, the PGOOD switch will be turned off and the PGOOD voltage will be pulled up to the voltage level defined by the pull up resistor or divider. When the FB voltage is outside of the tolerance band, +10 % above or –10 % below VREF typically, the PGOOD switch is turned on and the PGOOD pin voltage is pulled low to indicate power bad. Both rising and falling edges of the power-good flag have a built-in 220 µs (typical) deglitch delay.