Startup Regulator |
VVCC-REG |
VCC Regulator Output |
|
6.55 |
6.85 |
7.15 |
V |
|
VCC Current Limit |
VVCC = 6 V |
15 |
20 |
|
mA |
|
VCC UVLO Threshold |
VVCC increasing |
2.6 |
2.8 |
3 |
V |
|
VCC Undervoltage Hysteresis |
|
|
0.1 |
|
|
Bias Current (IIN) |
VFB = 1.5 V |
|
3.1 |
4.5 |
mA |
IQ |
Shutdown Current (IIN) |
VEN = 0V |
|
95 |
130 |
µA |
EN Thresholds |
|
EN Shutdown Threshold |
VEN increasing |
0.25 |
0.45 |
0.65 |
V |
|
EN Shutdown Hysteresis |
|
|
0.1 |
|
|
EN Standby Threshold |
VEN increasing |
1.2 |
1.26 |
1.32 |
|
EN Standby Hysteresis |
|
|
0.1 |
|
|
EN Current Source |
|
|
6 |
|
µA |
MOSFET Characteristics |
|
MOSFET RDS(ON) plus Current Sense Resistance |
LM5001 |
ID = 0.5 A |
|
490 |
800 |
mΩ |
LM5001-Q1 |
|
490 |
880 |
|
MOSFET Leakage Current |
VSW = 75 V |
|
0.05 |
5 |
µA |
|
MOSFET Gate Charge |
VVCC = 6.9 V |
|
4.5 |
|
nC |
Current Limit |
ILIM |
Cycle by Cycle Current Limit |
|
0.8 |
1.0 |
1.2 |
A |
|
Cycle by Cycle Current Limit Delay |
|
|
100 |
200 |
ns |
Oscillator |
FSW1 |
Frequency1 |
RRT = 48.7 kΩ |
225 |
260 |
295 |
KHz |
FSW2 |
Frequency2 |
RRT = 15.8 kΩ |
660 |
780 |
900 |
VRT-SYNC |
SYNC Threshold |
|
2.2 |
2.6 |
3.2 |
V |
|
SYNC Pulse Width Minimum |
VRT > VRT-SYNC + 0.5 V |
|
15 |
|
ns |
PWM Comparator |
|
Maximum Duty Cycle |
|
80% |
85% |
90% |
|
|
Min On-time |
VCOMP > VCOMP-OS |
|
35 |
|
ns |
|
Min On-time |
VCOMP < VCOMP-OS |
|
0 |
|
VCOMP-OS |
COMP to PWM Comparator Offset |
|
0.9 |
1.30 |
1.55 |
V |
Error Amplifier |
VFB-REF |
Feedback Reference Voltage |
Internal reference VFB = VCOMP |
1.241 |
1.260 |
1.279 |
V |
|
FB Bias Current |
|
|
10 |
|
nA |
|
DC Gain |
|
|
72 |
|
dB |
|
COMP Sink Current |
VCOMP = 250 mV |
2.5 |
|
|
mA |
|
COMP Short Circuit Current |
VFB = 0, VCOMP = 0 |
0.9 |
1.2 |
1.5 |
|
COMP Open Circuit Voltage |
VFB = 0 |
4.8 |
5.5 |
6.2 |
V |
|
COMP to SW Delay |
|
|
50 |
|
ns |
|
Unity Gain Bandwidth |
|
|
3 |
|
MHz |
Thermal Shutdown |
TSD |
Thermal Shutdown Threshold |
|
|
165 |
|
°C |
|
Thermal Shutdown Hysteresis |
|
|
20 |
|