8.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM5008 device with the WEBENCH® Power Designer.

1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

R1 and R2: From Functional Block Diagram, V_OUT1 = V_FB × (R1 + R2) / R2, and because V_FB = 2.5 V, the ratio of R1 to R2 calculates as 3:1. Standard values of 3.01 kΩ (R1) and 1.00 kΩ (R2) are chosen. Other values could be used as long as the 3:1 ratio is maintained. The selected values, however, provide a small amount of output loading (2.5 mA) in the event the main load is disconnected. This allows the circuit to maintain regulation until the main load is reconnected.

F_s and R_ON: The recommended operating frequency range for the LM5008 is 50 kHz to 600 kHz. Unless the application requires a specific frequency, the choice of frequency is generally a compromise because it affects the size of L1 and C2, and the switching losses. The maximum allowed frequency, based on a minimum on-time of 400 ns, is calculated from Equation 7:

For this exercise, F_MAX = 263 kHz. From Equation 2, R_ON calculates to 304 kΩ. A standard value 357-kΩ resistor is used to allow for tolerances in Equation 2, resulting in a frequency of 224 kHz.

L1: The main parameter affected by the inductor is the output current ripple amplitude. The choice of inductor value therefore depends on both the minimum and maximum load currents, keeping in mind that the maximum ripple current occurs at maximum V_IN.

1. Minimum load current: To maintain continuous conduction at minimum Io (100 mA), the ripple amplitude (I_OR) must be less than 200 mAp-p so the lower peak of the waveform does not reach zero. L1 is calculated using Equation 8.
Equation 8.

At V_IN = 95 V, L1 (minimum) calculates to 200 µH. The next larger standard value (220 µH) is chosen and with this value I_OR calculates to 181 mAp-p at V_IN = 95 V, and 34 mAp-p at V_IN = 12 V.

2. Maximum load current: At a load current of 300 mA, the peak of the ripple waveform must not reach the minimum value of the LM5008’s current limit threshold (410 mA). Therefore the ripple amplitude must be less than 220 mAp-p, which is already satisfied in Equation 8. With L1 = 220 µH, at maximum V_IN and I_O, the peak of the ripple will be 391 mA. While L1 must carry this peak current without saturating or exceeding its temperature rating, it also must be capable of carrying the maximum value of the LM5008’s current limit threshold (610 mA) without saturating, because the current limit is reached during start-up.

The DC resistance of the inductor should be as low as possible. For example, if the inductor’s DCR is 1 Ω, the power dissipated at maximum load current is 0.09 W. While small, it is not insignificant compared to the load power of 3 W.

C3: The capacitor on the V_CC output provides not only noise filtering and stability, but its primary purpose is to prevent false triggering of the V_CC UVLO at the buck switch ON/OFF transitions. For this reason, C3 should be no smaller than 0.1 µF.

C2, and R3: When selecting the output filter capacitor C2, the items to consider are ripple voltage due to its ESR, ripple voltage due to its capacitance, and the nature of the load.

1. ESR and R3: A low ESR for C2 is generally desirable so as to minimize power losses and heating within the capacitor. However, a hysteretic regulator requires a minimum amount of ripple voltage at the feedback input for proper loop operation. For the LM5008 the minimum ripple required at pin 5 is 25 mVp-p, requiring a minimum ripple at V_OUT1 of 100 mV. Because the minimum ripple current (at minimum V_IN) is 34 mAp-p, the minimum ESR required at V_OUT1 is 100 mV / 34 mA = 2.94 Ω. Because quality capacitors for SMPS applications have an ESR considerably less than this, R3 is inserted as shown in Functional Block Diagram. R3’s value, along with C2’s ESR, must result in at least 25 mVp-p ripple at pin 5. Generally, R3 will be 0.5 to 3 Ω.
2. Nature of the Load: The load can be connected to V_OUT1 or V_OUT2. V_OUT1 provides good regulation, but with a ripple voltage which ranges from 100 mV (at V_IN = 12 V) to 500 mV (at V_IN = 95 V). Alternatively, V_OUT2 provides low ripple, but lower regulation due to R3.

For a maximum allowed ripple voltage of 100 mVp-p at V_OUT2 (at V_IN = 95 V), assume an ESR of 0.4 Ω for C2. At maximum V_IN, the ripple current is 181 mAp-p, creating a ripple voltage of 72 mVp-p. This leaves 28 mVp-p of ripple due to the capacitance. The average current into C2 due to the ripple current is calculated using the waveform in Figure 11.

Figure 11. Inductor Current Waveform

Starting when the current reaches Io (300 mA in Figure 11) half way through the on-time, the current continues to increase to the peak (391 mA), and then decreases to 300 mA half way through the off-time. The average value of this portion of the waveform is 45.5 mA, and will cause half of the voltage ripple, or 14 mV. The interval is one half of the frequency cycle time, or 2.23 µs. Using the capacitor’s basic equation (see Equation 9), the minimum value for C2 is 7.2 µF.

The ripple due to C2’s capacitance is 90° out of phase from the ESR ripple, and the two numbers do not add directly. However, this calculation provides a practical minimum value for C2 based on its ESR and the target spec. To allow for the capacitor’s tolerance, temperature effects, and voltage effects, a 15-µF, X7R capacitor is used.

3. In summary: The above calculations provide a minimum value for C2 and a calculation for R3. The ESR is just as important as the capacitance. The calculated values are guidelines, and should be treated as starting points. For each application, experimentation is needed to determine the optimum values for R3 and C2.

R_CL: When a current limit condition is detected, the minimum off-time set by this resistor must be greater than the maximum normal off-time which occurs at maximum V_IN. Using Equation 4, the minimum on-time is 0.47 µs, yielding a maximum off-time of 3.99 µs. This is increased by 117 ns (to 4.11 µs) due to a ±25% tolerance of the on-time. This value is then increased to allow for:

The response time of the current limit detection loop (400 ns).

The off-time determined by Equation 5 has a ±25% tolerance.

Using Equation 5, R_CL calculates to 264 kΩ (at V_FB = 2.5 V). The closest standard value is 267 kΩ.

D1: The important parameters are reverse recovery time and forward voltage. The reverse recovery time determines how long the reverse current surge lasts each time the buck switch is turned on. The forward voltage drop is significant in the event the output is short-circuited as it is only this diode’s voltage which forces the inductor current to reduce during the forced off-time. For this reason, a higher voltage is better, although that affects efficiency. A good choice is an ultra-fast power diode, such as the MURA110T3 from ON Semiconductor. Its reverse recovery time is 30 ns, and its forward voltage drop is approximately 0.72 V at 300 mA at 25°C. Other types of diodes may have a lower forward voltage drop, but may have longer recovery times, or greater reverse leakage. D1’s reverse voltage rating must be at least as great as the maximum V_IN, and its current rating be greater than the maximum current limit threshold (610 mA).

C1: This capacitor’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple at V_IN, on the assumption that the voltage source feeding V_IN has an output impedance greater than zero. At maximum load current when the buck switch turns on, the current into pin 8 will suddenly increase to the lower peak of the output current waveform, ramp up to the peak value, then drop to zero at turnoff. The average input current during this on-time is the load current (300 mA). For a worst case calculation, C1 must supply this average load current during the maximum on-time. To keep the input voltage ripple to less than 2 V (for this exercise), C1 is calculated with Equation 11.

Equation 11.

Quality ceramic capacitors in this value have a low ESR which adds only a few millivolts to the ripple. It is the capacitance which is dominant in this case. To allow for the capacitor’s tolerance, temperature effects, and voltage effects, a 1.0-µF, 100-V, X7R capacitor will be used.

C4: The recommended value is 0.01 µF for C4, as this is appropriate in the majority of applications. A high-quality ceramic capacitor, with low ESR is recommended as C4 supplies the surge current to charge the buck switch gate at turnon. A low ESR also ensures a quick recharge during each off-time. At minimum V_IN, when the on-time is at maximum, it is possible during start-up that C4 will not fully recharge during each 300-ns off-time. The circuit will not be able to complete the start-up, and achieve output regulation. This can occur when the frequency is intended to be low (for example, R_ON = 500 K). In this case C4 should be increased so it can maintain sufficient voltage across the buck switch driver during each on-time.

C5: This capacitor helps avoid supply voltage transients and ringing due to long lead inductance at V_IN. A low-ESR, 0.1-µF ceramic chip capacitor is recommended, placed close to the LM5008.