ZHCSNW4 October 2022 LM5012-Q1
PRODUCTION DATA
| Pin | Type(1) | Description | |
|---|---|---|---|
| Name | NO. | ||
| GND | 1 | G | Ground connection for internal circuits |
| VIN | 2 | P | Regulator supply input pin to high-side power MOSFET and internal bias regulator. Connect directly to the input supply of the buck converter with short, low impedance paths. |
| EN/UVLO | 3 | I | Precision enable and undervoltage lockout (UVLO) programming pin. If the EN/UVLO voltage is below 1.1 V, the converter is in shutdown mode with all functions disabled. If the UVLO voltage is greater than 1.1 V and below 1.5 V, the converter is in standby mode with the internal VCC regulator operational and no switching. If the EN/UVLO voltage is above 1.5 V, the start-up sequence begins. |
| RON | 4 | I | On-time programming pin. A resistor between this pin and GND sets the buck switch on time. |
| FB | 5 | I | Feedback input of voltage regulation comparator |
| PGOOD | 6 | O | Power-good indicator. This pin is an open-drain output pin. Connect to a source voltage through an external pullup resistor between 10 kΩ to 100 kΩ. |
| BST | 7 | P | Bootstrap gate-drive supply. Required to connect a high-quality 2.2-nF, 50-V X7R ceramic capacitor between BST and SW to bias the internal high-side gate driver. |
| SW | 8 | P | Switching node that is internally connected to the source of the high-side NMOS buck switch. Connect to the switching node of the power inductor and Schottky diode. |
| EP | — | — | Exposed pad of the package. No internal electrical connection. Connect the EP to the GND pin and connect to a large copper plane to reduce thermal resistance. |