ZHCSKM9F May 2011 – December 2019 LM5050-1 , LM5050-1-Q1
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | VS | I | The main supply pin for all internal biasing and an auxiliary supply for the internal gate drive charge pump. Typically connected to either VOUT or VIN; a separate supply can also be used. |
2 | GND | PWR | Ground return for the controller |
3 | OFF | I | A logic high state at the OFF pin will pull the GATE pin low and turn off the external MOSFET. Note that when the MOSFET is off, current will still conduct through the FET's body diode. This pin should may be left open or connected to GND if unused. |
4 | IN | I | Voltage sense connection to the external MOSFET Source pin. |
5 | GATE | O | Connect to the Gate of the external MOSFET. Controls the MOSFET to emulate a low forward-voltage diode. |
6 | OUT | O | Voltage sense connection to the external MOSFET Drain pin. |