8.1.2 Fault Timer

An external capacitor connected from the TIMER pin to the GND pin sets the fault detection delay time. If the voltage on the TIMER capacitor reaches the V_TMRH threshold (2 V typical) a fault condition is indicated. The LM5060 will latch off the MOSFET by discharging the GATE pin at a 80 mA (typical) rate, and will remain latched off until either the EN pin, the UVLO pin, or the VIN pin is toggled low and then high.

There are three relevant components to the TIMER pin’s function:

1. A constant 6-µA (typical) current source driving the TIMER pin. This current source is active when EN, UVLO, and VIN are all high.
2. A second current source (5 µA typical) is activated, for a total charge current of 11 µA (typical), only when the V_GS sequence has completed successfully.
3. A pull-down current sink for the TIMER pin which resets the timer by discharging the timer capacitor. If EN, UVLO or VIN is low, or when OVP is high, the timer capacitor is discharged.
   1. When the V_DS Fault Comparator detects a fault, (SENSE pin voltage higher than OUT pin voltage) the timer capacitor pull down is disabled and the timer capacitor is allowed to charge at the 11-µA (typical) rate.

During Start-Up, the timer behaves as follows:

After applying sufficient system voltage and enabling the LM5060 by pulling the EN and UVLO pins high, the timer capacitor will be charged with a 6-µA (typical) current source. The timer capacitor is discharged when the voltage difference between the GATE pin and the OUT pin (i.e. V_GS of the external N-Channel MOSFET) reaches the V_GATE-TH threshold (typically 5 V). After discharging, the timer capacitor is charged with 11 µA until either the V_TMRH threshold (typically 2 V) is reached, or the sensed V_DS voltage falls below the threshold of the V_DS Fault Comparator, indicating the output voltage has reached the desired steady state level. The timer capacitor voltage waveforms are illustrated in Figure 21, Figure 22, and Figure 23.

A timer capacitor is always necessary to allow some finite amount of time for the gate to charge and the output voltage to rise during startup. If an adequate timer capacitor value is not used, then the 6 µA of charge current would cause the TIMER pin voltage to reach the V_TMRH fault threshold (typically 2 V) prematurely and the LM5060 will latch off since a fault condition would have been indicated.

Although not recommended, the timer function can be disabled by connecting the TIMER pin directly to GND. With this condition the TIMER pin voltage will never reach the V_TMRH fault threshold (2 V typical). The end result is that the fault latch-off protection is completely disabled, while the nPGD pin will continue to reflect the V_DS Fault Comparator output.