7.3.8 Hiccup Mode Current Limiting

To further protect the regulator during prolonged current limit conditions, an internal counter counts the PWM clock cycles during which cycle-by-cycle current limiting occurs. When the counter detects 256 consecutive cycles of current limiting, the regulator enters a low power dissipation hiccup mode with the HO and LO outputs disabled. The restart timer pin, RES, and an external capacitor configure the hiccup mode current limiting. A capacitor on the RES pin (C_RES) determines the time the controller remains in low power standby mode before automatically restarting. A 10-µA current source charges the RES pin capacitor to the 1.25-V threshold which restarts the overloaded channel. The two regulator channels operate independently. One channel may operate normally while the other is in the hiccup mode overload protection. The hiccup mode commences when either channel experiences 256 consecutive PWM cycles with cycle-by-cycle current limiting. If that occurs, the overloaded channel turns off and remains off for the duration of the RES pin timer.

The hiccup mode current limiting function can be disabled. The RES configuration is latched during initial power up when UVLO is above 1.25 V and VCC1 and VCC2 are above their UV thresholds, determining hiccup or non-hiccup current limiting. If the RES pin is tied to VCC at initial power on, hiccup current limit is disabled.