ZHCSI53A May 2018 – November 2018 LM5122ZA
PRODUCTION DATA.
For duty cycles greater than 50%, peak-current-mode regulators are subject to sub-harmonic oscillation. Sub-harmonic oscillation is normally characterized by observing alternating wide and narrow duty cycles. This sub-harmonic oscillation can be eliminated by a technique, which adds an artificial ramp, known as slope compensation, to the sensed inductor current.
The amount of slope compensation is programmable by a single resistor connected between the SLOPE pin and the AGND pin. The amount of slope compensation can be calculated as follows:
where
RSLOPE value can be determined from Equation 6 at minimum input voltage:
where
From Equation 6, K can be calculated over the input range as follows:
where
In any case, K should be greater than at least 0.5. At higher switching frequency over 500 kHz, TI recommends that K factor be greater than or equal to 1 because the minimum on-time affects the amount of slope compensation due to internal delays.
The sum of sensed inductor current and slope compensation should be less than COMP output high voltage (VOH) for proper startup with load and proper current limit operation. This limits the minimum value of RSLOPE to be:
where
where
The SLOPE pin cannot be left floating.