ZHCSMW2B December 2021 – December 2022 LM5123-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 说明（续）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Device Enable/Disable (EN, VH Pin)
- 8.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)
- 8.3.3 Light Load Switching Mode Selection (MODE Pin)
- 8.3.4 VOUT Range Selection (RANGE Pin)
- 8.3.5 Line Undervoltage Lockout (UVLO Pin)
- 8.3.6 Fast Restart using VCC HOLD (VH Pin)
- 8.3.7 Adjustable Output Regulation Target (VOUT, TRK, VREF Pin)
- 8.3.8 Overvoltage Protection (VOUT Pin)
- 8.3.9 Power Good Indicator (PGOOD Pin)
- 8.3.10 Dynamically Programmable Switching Frequency (RT)
- 8.3.11 External Clock Synchronization (SYNC Pin)
- 8.3.12 Programmable Spread Spectrum (DITHER Pin)
- 8.3.13 Programmable Soft Start (SS Pin)
- 8.3.14 Wide Bandwidth Transconductance Error Amplifier and PWM (TRK, COMP Pin)
- 8.3.15 Current Sensing and Slope Compensation (CSP, CSN Pin)
- 8.3.16 Constant Peak Current Limit (CSP, CSN Pin)
- 8.3.17 Maximum Duty Cycle and Minimum Controllable On-Time Limits
- 8.3.18 Deep Sleep Mode and Bypass Operation (HO, CP Pin)
- 8.3.19 MOSFET Drivers, Integrated Boot Diode, and Hiccup Mode Fault Protection (LO, HO, HB Pin)
- 8.3.20 Thermal Shutdown Protection
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.1 Device Enable/Disable (EN, VH Pin)
The device shuts down when EN is less than the EN threshold (VEN) and VH is less than the SYNC threshold (VSYNC). The device is enabled when EN is greater than VEN or VH is greater than VSYNC. The VH pin provides a 40-μs internal delay before the device shuts down.
During shutdown a 33-kΩ internal pulldown resistor on the EN pin is connected to GND to prevent a false turn-on when the pin is floating. Once EN goes above the EN threshold (VEN), the 33-kΩ resistor is disconnected and the IUVLO-HYS current source is enabled to provide the UVLO functionality. The IUVLO-HYS current is designed to avoid chatter around the EN threshold voltage.
Figure 8-1 EN/UVLO Circuit