ZHCSLJ6A June 2021 – June 2021 LM5145-Q1
PRODUCTION DATA
Apply an external clock synchronization signal to the LM5145-Q1 to synchronize switching in both frequency and phase. Requirements for the external clock SYNC signal are:
Figure 8-5 shows a clock signal at 400 kHz and the corresponding SW node waveform (VIN = 48 V, VOUT = 5 V, free-running frequency = 280 kHz). The SW voltage waveform is synchronized with respect to the rising edge of SYNCIN. The rising edge of the SW voltage is phase delayed relative to SYNCIN by approximately 100 ns.