6 Pin Configuration and Functions

Figure 6-1 16-Pin WQFNRUM Package(Top View)

Table 6-1 Pin Functions

PIN		I/O⁽³⁾	DESCRIPTION
NO.	NAME	I/O⁽³⁾	DESCRIPTION
1	SYNC	I	External synchronization clock input pin. The internal oscillator is synchronized to an external clock by applying a pulse signal into the SYNC pin in the start-stop configuration. Connect directly to ground if not used or in emergency call configuration. Maximum duty cycle limit can be programmed by controlling the external synchronization clock frequency.
2	STATUS	O	Status indicator with an open-drain output stage. Internal pulldown switch holds the pin low when the device is not boosting. The pin can be left floating if not used.
3	EN	I	Enable pin. If EN is below 1 V, the device is in shutdown mode. The pin must be raised above 2 V to enable the device. Connect directly to VOUT pin for an automatic boost.
4	VOUT	I/P	Boost output voltage-sensing pin and input to VCC regulator. Connect to the output of the boost converter.
5	PVCC	O/P	Output of the VCC bias regulator. Decouple locally to PGND using a low-ESR or low-ESL ceramic capacitor located as close to the device as possible.
6	NC	—	No internal electrical connection. Leave the pin floating or connect directly to ground.
7	AVCC	I/P	Analog VCC supply input. Decouple locally to AGND using 0.1-µF low-ESR or low-ESL ceramic capacitor located as close to the device as possible. Connect to the PVCC pin through 10-Ω resistor.
8	NC	—	No internal electrical connection. Leave the pin floating or connect directly to ground.
9	LO	O	N-channel MOSFET gate drive output. Connect to the gate of the N-channel MOSFET through a short, low inductance path.
10	PGND	G	Power ground pin. Connect to the ground connection of the sense resistor through a wide and short path.
11	AGND	G	Analog ground pin. Connect to the analog ground plane through a wide and short path.
12	CS	I	Current sense input pin. Connect to the positive side of the current sense resistor through a short path.
13	COMP	O	Output of the internal transconductance error amplifier. The loop compensation components must be connected between this pin and AGND.
14	RT	I	Switching frequency setting pin. The switching frequency is programmed by a single resistor between RT and AGND.
15	VSET	I	Configuration selection and VOUT regulation target programming pin. During initial power on, a resistor between the VSET pin and AGND configures the VOUT regulation target and the configuration.
16	VIN	I	Boost input voltage sensing pin. Connect to the input supply of the boost converter.
—	EP	—	Exposed pad of the package. No internal electrical connection to silicon die. The EP is electrically connected to anchor pads. The EP must be connected to the large ground copper plain to reduce thermal resistance.
—	AP	—	Anchor pad of the package. No internal electrical connection to silicon die. The AP is electrically connected to the EP. The AP can be left floating or soldered to the ground copper.

(3) G = Ground, I = Input, O = Output, P = Power