ZHCSFE2A August 2016 – November 2017 LM5161-Q1
PRODUCTION DATA.
- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Control Circuit
- 7.3.2 VCC Regulator
- 7.3.3 Regulation Comparator
- 7.3.4 Soft-Start
- 7.3.5 Error Transconductance (GM) Amplifier
- 7.3.6 On-Time Generator
- 7.3.7 Current Limit
- 7.3.8 N-Channel Buck Switch and Driver
- 7.3.9 Synchronous Rectifier
- 7.3.10 Enable / Undervoltage Lockout (EN/UVLO)
- 7.3.11 Thermal Protection
- 7.3.12 Ripple Configuration
- 7.4 Device Functional Modes
-
8 Applications and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
LM5161-Q1 Synchronous Buck (15-V to 95-V Input, 12-V Output, 1-A Load)
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 Custom Design With WEBENCH® Tools
- 8.2.1.2.2 Output Resistor Divider Selection
- 8.2.1.2.3 Frequency Selection
- 8.2.1.2.4 Inductor Selection
- 8.2.1.2.5 Output Capacitor Selection
- 8.2.1.2.6 Series Ripple Resistor - RESR (FPWM = 1)
- 8.2.1.2.7 VCC and Bootstrap Capacitor
- 8.2.1.2.8 Input Capacitor Selection
- 8.2.1.2.9 Soft-Start Capacitor Selection
- 8.2.1.2.10 EN/UVLO Resistor Selection
- 8.2.1.3 Application Curves
- 8.2.2 LM5161-Q1 Isolated Fly-Buck (36-V to 72-V Input, 12-V, 12-W Isolated Output)
- 8.2.1
LM5161-Q1 Synchronous Buck (15-V to 95-V Input, 12-V Output, 1-A Load)
- 8.3 Do's and Don'ts
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文档支持
- 12机械、封装和可订购信息
8.2.1.2.8 Input Capacitor Selection
The input capacitor must be large enough to limit the input voltage ripple to an acceptable level. Equation 18 provides the input capacitance CIN required for a worst case input ripple of ∆VIN, ripple.
CIN (C4, C6) supplies most of the switch current during the ON-time to limit the voltage ripple at the VIN pin. At maximum load current, when the buck switch turns on, the current into the VIN pin quickly increases to the valley current of the inductor ripple and then ramps up to the peak of the inductor ripple during the ON-time of the high-side FET. The average current during the ON-time is the output load current. For a worst-case calculation, CIN must supply this average load current during the maximum ON-time, without letting the voltage at VIN drop more than the desired input ripple. For this design, the input voltage drop is limited to 0.5 V and the value of CIN is calculated using Equation 18.
Based on Equation 18, the value of the input capacitor is calculated to be approximately 1.68 µF at D = 0.5. Taking into account the decrease in capacitance over an applied voltage, two standard value ceramic capacitors of 2.2 μF are selected for C4 and C6. The input capacitors should be rated for the maximum input voltage under all operating and transient conditions. A 100-V, X7R dielectric was selected for this design.
A third input capacitor C5 is needed in this design as a bypass path for the high frequency component of the input switching current. The value of C5 is 0.1 μF and this bypass capacitor must be placed directly across VIN and PGND (pin 3 and 2) near the IC. The CIN values and location are critical to reducing switching noise and transients.