ZHCSPF2A December   2021  – September 2022 LM5168 , LM5169

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Control Architecture
      2. 8.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 8.3.3  Internal Soft Start
      4. 8.3.4  On-Time Generator
      5. 8.3.5  Current Limit
      6. 8.3.6  N-Channel Buck Switch and Driver
      7. 8.3.7  Synchronous Rectifier
      8. 8.3.8  Enable, Undervoltage Lockout (EN/UVLO)
      9. 8.3.9  Power Good (PGOOD)
      10. 8.3.10 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 Sleep Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Fly-Buck™ Converter Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency (RT)
        2. 9.2.2.2  Transformer Selection
        3. 9.2.2.3  Output Capacitor Selection
        4. 9.2.2.4  Secondary Output Diode
        5. 9.2.2.5  Setting Output Voltage
        6. 9.2.2.6  Input Capacitor
        7. 9.2.2.7  Type-3 Ripple Network
        8. 9.2.2.8  CBST Selection
        9. 9.2.2.9  Minimum Secondary Output Load
        10. 9.2.2.10 Example Design Summary
      3. 9.2.3 Application Curves
    3. 9.3 Typical Buck Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Switching Frequency (RT)
        2. 9.3.2.2 Buck Inductor Selection
        3. 9.3.2.3 Setting the Output Voltage
        4. 9.3.2.4 Type-3 Ripple Network
        5. 9.3.2.5 Output Capacitor Selection
        6. 9.3.2.6 Input Capacitor Considerations
        7. 9.3.2.7 CBST Selection
        8. 9.3.2.8 Example Design Summary
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Thermal Considerations
      2. 9.5.2 Typical EMI Results
      3. 9.5.3 Layout Guidelines
        1. 9.5.3.1 Compact PCB Layout for EMI Reduction
        2. 9.5.3.2 Feedback Resistors
      4. 9.5.4 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

Sleep Mode

Control Architecture gives a brief introduction to the LM516x diode emulation (DEM) feature. The converter enters DEM during light-load conditions when the inductor current decays to zero and the synchronous MOSFET is turned off to prevent negative current in the system. In the DEM state, the load current is lower than half of the peak-to-peak inductor current ripple and the switching frequency decreases when the load is further decreased as the device operates in a pulse skipping mode. A switching pulse is set when VFB drops below 1.2 V.

As the frequency of operation decreases and VFB remains above 1.2 V (VREF) with the output capacitor sourcing the load current for greater than 15 µs, the converter enters an ultra-low IQ sleep mode to prevent draining the input power supply. The input quiescent current (IQ) required by the LM516x decreases to 10 µA in sleep mode, improving the light-load efficiency of the regulator. In this mode, all internal controller circuits are turned off to ensure very low current consumption by the device. Such low IQ renders the LM516x as the best option to extend operating lifetime for off-battery applications. The FB comparator and internal bias rail are active to detect when the FB voltage drops below the internal reference VREF and the converter transitions out of sleep mode into active mode. There is a 9-µs wake-up delay from sleep to active states.