TI strongly recommends employing a non-inductive resistor for R_CS. Even a few nH of inductance will cause the current sense signal to be remarkably distorted, as shown in Figure 9-4. The adversary consequences include reduced peak current limit than actually programmed and false current zero-crossing detection well above 0 A. The former may reduce the available maximum current to be delivered; and the latter will terminate the sync FET gate early and the body diode is used to conduct the remaining current, thereby reducing the efficiency as well as the accuracies of the channel DC current regulation and IOUT monitors under light load.

When the current sense resistor has some parasitic inductance, it is necessary to compensate the effects of inductance with an RC circuit, as shown in Figure 9-5. The user should place a 1-Ω resistor in each of the current sense signal path, and the selection of C_CS should satisfy Equation 37, assuming the inductance of the current sense resistor is L_CS:

Equation 37.

For instance, if R_CS =1 mΩ, L_CS = 1 nH, the required compensation capacitor C_CS should be approximately 0.5 µF.

Note that selecting C_CS greater than the value given by Equation 37 would over compensate the inductance and consequently defer the current zero crossing detection point to a negative current. Excessively larger capacitor should not be used to prevent malfunction of the controller.

Figure 9-4 Effects of Parasitic Inductance on the Current Sense Signal and Zero Crossing Detection

Figure 9-5 Compensation Network to Compensate the Current Sense Resistor’s Parasitic Inductance