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7.1 Absolute Maximum Ratings⁽¹⁾

	MIN	MAX	UNIT
VIN, EN/UVLO, VISNS, VOSNS, ISNS(+), ISNS(–)	–0.3	60	V
BIAS	–0.3	40
FB, SS, DITH, RT/SYNC, SLOPE, COMP	–0.3	3.6
SW1, SW2	–1	60
SW1, SW2 (20 ns transient)	–3.0	65
VCC, MODE, PGOOD	–0.3	8.5
LDRV1, LDRV2	–0.3	8.5
BOOT1, HDRV1 with respect to SW1	–0.3	8.5
BOOT2, HDRV2 with respect to SW2	–0.3	8.5
BOOT1, BOOT2	–0.3	68
CS, CSG	–0.3	0.3
Operating junction temperature	–40	150	°C
Storage temperature, T_stg	-65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

		VALUE	UNIT
V_ESD⁽¹⁾	Human body model (HBM) ESD stress voltage⁽²⁾	±2000	V
V_ESD⁽¹⁾	Charged device model (CDM) ESD stress voltage⁽³⁾	±750	V

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges into the device.

(2) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.

(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_IN	Input voltage range	3.5	42	V
BIAS	Bias supply voltage range	8	36
V_OUT	Output voltage range	0.8	55
EN/UVLO	Enable voltage range	0	42
ISNS(+), ISNS(-)	Average current sense common mode range	0	55
T_J	Operating temperature range⁽²⁾	–40	125	°C
F_sw	Operating frequency range	100	600	kHz

(1) Recommended Operating Conditions are conditions under the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics .

(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM5175		UNIT
		HTSSOP	QFN
		28 PINS	28 PINS
R_θJA	Junction-to-ambient thermal resistance	33.1	34.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	17.7	26.6
R_θJB	Junction-to-board thermal resistance	14.9	6.3
ψ_JT	Junction-to-top characterization parameter	0.4	0.3
ψ_JB	Junction-to-board characterization parameter	14.7	6.2
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	1.1	2.0

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Typical values correspond to T_J = 25°C. Minimum and maximum limits apply over the –40°C to 125°C junction temperature range unless otherwise stated. V_IN = 24 V unless otherwise stated.⁽¹⁾

PARAMETER		TEST CONDITION	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (V_IN)
V_IN	Operating input voltage		3.5		42	V
I_Q	V_INshutdown current	V_EN/UVLO = 0 V		1.4	10	µA
	V_IN standby current	V_EN/UVLO = 1.1 V, non-switching		0.7	2
	V_IN operating current	V_EN/UVLO = 2 V, V_FB = 0.9 V		1.65	4	mA
VCC
V_VCC(VIN)	Regulation voltage	V_BIAS = 0 V, VCC open	6.95	7.35	7.88	V
V_UV(VCC)	VCC Undervoltage lockout	VCC increasing	3.11	3.27	3.43	V
	Undervoltage hysteresis			160		mV
I_VCC	VCC current limit	V_VCC = 0 V	65			mA
R_OUT(VCC)	VCC regulator output impedance	I_VCC = 30 mA, V_IN = 3.5 V		9.3	16	Ω
BIAS
V_BIAS(SW)	BIAS switchover voltage	V_IN = 24 V	7.25	8	8.75	V
EN/UVLO
V_EN(STBY)	Standby threshold	EN/UVLO rising	0.55	0.79	0.97	V
I_EN(STBY)	Standby source current	V_EN/UVLO = 1.1 V	1	2	3	µA
V_EN(OP)	Operating threshold	EN/UVLO rising	1.17	1.23	1.29	V
ΔI_HYS(OP)	Operating hysteresis current	V_EN/UVLO = 2.4 V	1.5	3.5	5.5	µA
SS
I_SS	Soft-start pull up current	V_SS = 0 V	4.30	5.65	7.25	µA
V_SS(CL)	SS clamp voltage	SS open		1.27		V
V_FB - V_SS	FB to SS offset	V_SS = 0 V		-15		mV
EA (ERROR AMPLIFIER)
V_REF	Feedback reference voltage	FB = COMP	0.788	0.800	0.812	V
gm_EA	Error amplifier gm			1.27		mS
I_SINK/I_SOURCE	COMP sink/source current	V_FB=V_REF ± 300 mV		280		µA
R_OUT	Amplifier output resistance			20		MΩ
BW	Unity gain bandwidth			2		MHz
I_BIAS(FB)	Feedback pin input bias current	FB in regulation			100	nA
FREQUENCY
f_SW(1)	Switching Frequency 1	RT = 133 kΩ	180	200	220	kHz
f_SW(2)	Switching Frequency 2	RT = 47 kΩ	430	500	565	kHz
DITHER
I_DITHER	Dither source/sink current			10.5		µA
V_DITHER	Dither high threshold			1.27		V
	Dither low threshold			1.16		V
SYNC
V_SYNC	Sync input high threshold		2.1			V
	Sync input low threshold				1.2	V
PW_SYNC	Sync input pulse width		75		500	ns
CURRENT LIMIT
V_CS(BUCK)	Buck current limit threshold (Valley)	V_IN = V_VISNS = 24 V, V_VOSNS = 12 V, V_SLOPE = 0 V, T_J = 25°C	53.2	76	98	mV
V_CS(BOOST)	Boost current limit threshold (Peak)	V_IN = V_VISNS = 12 V, V_VOSNS = 18 V, V_SLOPE = 0 V, T_J = 25°C	119	170	221	mV
I_BIAS(CS/CSG)	CS/CSG pin bias current	V_CS = V_CSG = 0 V		-75		µA
I_{OFFSET(CS/CSG)}	CSG pin bias current	V_CS = V_CSG = 0 V			14	µA
CONSTANT CURRENT LOOP
V_SNS	Average current loop regulation target	V_ISNS(-) = 24 V, sweep ISNS(+), V_SS = 0.8 V	43	50	57	mV
I_SNS	ISNS(+)/ISNS(–) pin bias currents	V_ISNS(+) = V_ISNS(–) = V_IN = 24 V		7		µA
Gm	gm of soft-start pull down amplifier	V_ISNS(+)–V_ISNS(–) = 55 mV, V_SS = 0.5 V		1		mS
SLOPE
I_SLOPE	Buck adaptive slope current	V_IN = V_VINSNS = 24 V, V_VOSNS = 12 V, V_SLOPE = 0 V	24	30	35	µA
	Boost adaptive slope current	V_IN = V_VINSNS = 12 V, V_VOSNS = 18 V, V_SLOPE = 0 V	13	17	21	µA
gm_SLOPE	Slope compensation amplifier gm			2		µS
MODE
I_MODE	Source current out of MODE pin		17	20	23	µA
V_{DCM_HIC}	DCM with hiccup threshold		0.60	0.7	0.76	V
V_{CCM_HIC}	CCM with hiccup threshold		1.18	1.28	1.38
V_CCM	CCM no hiccup threshold		2.22	2.4	2.6
PGOOD
V_PGD	PGOOD trip threshold for falling FB	Measured with respect to V_REF		–9		%
	PGOOD trip threshold for rising FB	Measured with respect to V_REF		10		%
	Hysteresis			1.6		%
I_LEAK(PGD)	PGOOD leakage current				100	nA
I_SINK(PGD)	PGOOD sink current	V_PGOOD = 0.4 V	2	4.2	6.5	mA
OUTPUT OVP
V_OVP	Output overvoltage threshold	At the FB pin		0.86		V
	Hysteresis			21		mV
NMOS DRIVERS
I_HDRV1,2	Driver peak source current	V_BOOT - V_SW = 7 V		1.8		A
	Driver peak sink current	V_BOOT - V_SW = 7 V		2.2
I_LDRV1,2	Driver peak source current			1.8
	Driver peak sink current			2.2
R_HDRV1,2	Driver pull up resistance	V_BOOT - V_SW = 7 V		1.9		Ω
	Driver pull down resistance	V_BOOT - V_SW = 7 V		1.3		Ω
V_UV(BOOT1,2)	BOOT1,2 to SW1,2 UVLO threshold	HDRV1,2 shut off		2.73		V
	BOOT1,2 to SW1,2 UVLO hysteresis	HDRV1,2 start switching		280		mV
	BOOT1,2 to SW1,2 threshold for refresh pulse			4.45		V
R_LDRV1,2	Driver pull up resistance	I_DRV1,2 = 0.1 A		2		Ω
	Driver pull down resistance	I_DRV1,2 = 0.1 A		1.5		Ω
t_DT1	Dead time HDRV1,2 off to LDRV1,2 on			55		ns
t_DT2	Dead time LDRV1,2 off to HDRV1,2 on			55		ns
THERMAL SHUTDOWN
T_SD	Thermal shutdown temperature			165		°C
T_SD(HYS)	Thermal shutdown hysteresis			15		°C

(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.