With the provision to locate the
controller as close as possible to the power MOSFETs to minimize gate driver trace
runs, the components related to the analog and feedback signals as well as current
sensing are considered in the following:
- Separate power and signal
traces, and use a ground plane to provide noise shielding.
- Place all sensitive analog traces
and components related to COMP, FB, SLOPE, SS/ATRK, and RT away from
high-voltage switching nodes such as the following to avoid mutual coupling:
- SW1
- SW2
- HO1
- HO2
- LO1
- LO2
- HB1
- HB2
- Use an internal layer or layers
as ground plane or planes. Pay particular attention to shielding the feedback
(FB) trace from power traces and components.
- Route the CSA and CSB and ISNSP
and ISNSN traces as differential pairs to minimize noise pickup and use Kelvin
connections to the applicable shunt resistor.
- Locate the upper and lower
feedback resistors close to the FB pins, keeping the FB traces as short as
possible. Route the trace from the upper feedback resistor or resistors to the
output voltage sense point.
- Use a common ground node for
power ground and a different one for analog ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground
pins of the IC.
- The HTSSOP package offers a means
of removing heat from the semiconductor die through the exposed thermal pad at
the base of the package. While the exposed pad of the package is not directly
connected to any leads of the package, it is thermally connected to the
substrate (ground) of the device. This connection allows a significant
improvement in heat sinking, and it becomes imperative that the PCB is designed
with thermal lands, thermal vias, and a ground plane to complete the heat
removal subsystem.