ZHCSL10C March 2020 – June 2021 LM61440-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 说明（续）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 EN/SYNC Uses for Enable and VIN UVLO
- 9.3.2 EN/SYNC Pin Uses for Synchronization
- 9.3.3 Clock Locking
- 9.3.4 Adjustable Switching Frequency
- 9.3.5 PGOOD Output Operation
- 9.3.6 Internal LDO, VCC UVLO, and BIAS Input
- 9.3.7 Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
- 9.3.8 Adjustable SW Node Slew Rate
- 9.3.9 Spread Spectrum
- 9.3.10 Soft Start and Recovery From Dropout
- 9.3.11 Output Voltage Setting
- 9.3.12 Overcurrent and Short Circuit Protection
- 9.3.13 Thermal Shutdown
- 9.3.14 Input Supply Current
- 9.4 Device Functional Modes
-
10Application and Implementation
- 10.1 Application Information
- 10.2
Typical Application
- 10.2.1 Design Requirements
- 10.2.2
Detailed Design Procedure
- 10.2.2.1 Choosing the Switching Frequency
- 10.2.2.2 Setting the Output Voltage
- 10.2.2.3 Inductor Selection
- 10.2.2.4 Output Capacitor Selection
- 10.2.2.5 Input Capacitor Selection
- 10.2.2.6 BOOT Capacitor
- 10.2.2.7 BOOT Resistor
- 10.2.2.8 VCC
- 10.2.2.9 BIAS
- 10.2.2.10 CFF and RFF Selection
- 10.2.2.11 External UVLO
- 10.2.3 Application Curves
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
9.4.3.1 CCM Mode
The following operating description of the LM61440-Q1 refers to Section 9.2 and to the waveforms in Figure 9-15. In CCM, the LM61440-Q1 supplies a regulated output voltage by turning on the internal high-side (HS) and low-side (LS) NMOS switches with varying duty cycle (D). During the HS switch on-time, the SW pin voltage, VSW, swings up to approximately VIN, and the inductor current, iL, increases with a linear slope. The HS switch is turned off by the control logic. During the HS switch off-time, tOFF, the LS switch is turned on. Inductor current discharges through the LS switch, which forces the VSW to swing below ground by the voltage drop across the LS switch. The converter loop adjusts the duty cycle to maintain a constant output voltage. D is defined by the on-time of the HS switch over the switching period:
In an ideal buck converter where losses are ignored, D is proportional to the output voltage and inversely proportional to the input voltage:
Figure 9-15 SW Voltage and Inductor Current Waveforms in Continuous Conduction Mode (CCM)