ZHCSL19C May 2019 – June 2021 LM61440
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 EN/SYNC Uses for Enable and VIN UVLO
- 8.3.2 EN/SYNC Pin Uses for Synchronization
- 8.3.3 Clock Locking
- 8.3.4 Adjustable Switching Frequency
- 8.3.5 PGOOD Output Operation
- 8.3.6 Internal LDO, VCC UVLO, and BIAS Input
- 8.3.7 Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
- 8.3.8 Adjustable SW Node Slew Rate
- 8.3.9 Spread Spectrum
- 8.3.10 Soft Start and Recovery From Dropout
- 8.3.11 Output Voltage Setting
- 8.3.12 Overcurrent and Short Circuit Protection
- 8.3.13 Thermal Shutdown
- 8.3.14 Input Supply Current
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.11 Output Voltage Setting
A feedback resistor divider network between the output voltage and the FB pin is used to set output voltage level. See Figure 8-11.
Figure 8-11 Setting Output Voltage of Adjustable VersionsThe LM61440 uses a 1-V reference voltage for the feedback (FB) pin. The FB pin voltage is regulated by the internal controller to be the same as the reference voltage. The output voltage level is then set by the ratio of the resistor divider. Equation 3 can be used to determine RFBB for a desired output voltage and a given RFBT. Usually RFBT is between 10 kΩ and 1 MΩ. 100 kΩ is recommended for RFBT for improved noise immunity compared to 1 MΩ and reduced current consumption compared to lower resistance values.
In addition, a feedforward capacitor, CFF, connected in parallel with RFBT can be required to optimize the transient response.