ZHCSKA7F May   2019  – June 2021 LM61460-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 计时特性
    7. 8.7 Systems Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  EN/SYNC Uses for Enable and VIN UVLO
      2. 9.3.2  EN/SYNC Pin Uses for Synchronization
      3. 9.3.3  Clock Locking
      4. 9.3.4  Adjustable Switching Frequency
      5. 9.3.5  PGOOD Output Operation
      6. 9.3.6  Internal LDO, VCC UVLO, and BIAS Input
      7. 9.3.7  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      8. 9.3.8  Adjustable SW Node Slew Rate
      9. 9.3.9  Spread Spectrum
      10. 9.3.10 Soft Start and Recovery From Dropout
      11. 9.3.11 Output Voltage Setting
      12. 9.3.12 Overcurrent and Short Circuit Protection
      13. 9.3.13 Thermal Shutdown
      14. 9.3.14 Input Supply Current
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Active Mode
        1. 9.4.3.1 CCM Mode
        2. 9.4.3.2 Auto Mode - Light Load Operation
          1. 9.4.3.2.1 Diode Emulation
          2. 9.4.3.2.2 Frequency Reduction
        3. 9.4.3.3 FPWM Mode - Light Load Operation
        4. 9.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 9.4.3.5 Dropout
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Choosing the Switching Frequency
        2. 10.2.2.2  Setting the Output Voltage
        3. 10.2.2.3  Inductor Selection
        4. 10.2.2.4  Output Capacitor Selection
        5. 10.2.2.5  Input Capacitor Selection
        6. 10.2.2.6  BOOT Capacitor
        7. 10.2.2.7  BOOT Resistor
        8. 10.2.2.8  VCC
        9. 10.2.2.9  BIAS
        10. 10.2.2.10 CFF and RFF Selection
        11. 10.2.2.11 External UVLO
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 接收文档更新通知
    3. 13.3 支持资源
    4. 13.4 Trademarks
    5. 13.5 静电放电警告
    6. 13.6 术语表
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Revision History

Changes from Revision E (April 2021) to Revision F (June 2021)

  • Added  Added EVM thermal resistanceGo

Changes from Revision D (April 2020) to Revision E (April 2021)

  • 更新了整个文档中的表格、图和交叉参考的编号格式。Go
  • 添加了 LMQ61460-Q1 链接Go
  • Changed RθJA from 59 to 58.7Go
  • Changed θJC(top) from 19 to 26.1Go
  • Added IQ_VIN Go
  • Removed TJ = 25°C from VFB_acc test conditionGo
  • Changed VEN-ACC from ±8.1% to ±5%Go
  • Changed IQ typical value from 0.6 to 9Go
  • Changed IQ nax value from 6 to 18Go

Changes from Revision C (2019 年 12 月) to Revision D (2020 年 4 月)

  • 向特性 添加了功能安全项目符号Go
  • Changed part numbers from "RT" to "RR" Go
  • Changed µA to nAGo
  • Added CFF column in Table 10-5 Go

Changes from Revision B (2019 年 12 月) to Revision C (2019 年 12 月)

  • 将器件状态从“预告信息”更改为“量产数据”Go
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