The LM73100 functions like an ideal diode and blocks reverse current flow from OUT to IN under all conditions. The device has integrated back-to-back MOSFETs connected in a common drain configuration. The voltage drop between the IN and OUT pins is constantly monitored and the gate drive of the blocking FET (BFET) is adjusted as needed to regulate the forward voltage drop at V_FWD. This closed loop regulation scheme enables graceful turn off of the MOSFET during a reverse current event and ensures there's no DC reverse current flow.

The device also uses a conventional comparator (V_REVTH) based reverse blocking mechanism to provide fast response to transient reverse currents.Once the device enters reverse current blocking condition, it waits for the (V_IN - V_OUT) forward drop to exceed the V_FWDTH before it performs a fast recovery to reach full forward conduction state. This provides sufficient hysterisis to prevent supply noise or ripple from affecting the reverse current blocking response. The recovery from reverse current blocking is very fast (t_SWRCB). This ensures minimum supply droop which is helpful in applications such as power MUX/ORing.

Figure 7-6 Reverse Current Blocking Response

The waveforms below illustrate the reverse current blocking performance in various scenarios.

During fast voltage step at output (e.g. hot-plug), the fast comparator based reverse blocking mechanism ensures minimum jump/glitch on the input rail.

Figure 7-7 Reverse Current Blocking Performance During Fast Voltage Step at Output

During slow voltage ramp at output, the linear ORing based reverse blocking mechanism ensures there's no DC current flow from OUT to IN, thereby avoiding input rail from getting slowly charged up to output voltage.

Figure 7-8 Reverse Current Blocking Performance During Slow Voltage Ramp at Output

When the input supply droops or gets disconnected while the output storage element (capacitor bank or super capacitor) is charged to the full voltage, the linear ORing scheme minimizes the self-discharge from OUT to IN. This ensures maximum hold-up time for the output storage element in critical power back-up applications.

It also prevents incorrect supply presence indication in applications which sense the input voltage to detect if the supply is connected.

Figure 7-9 Reverse Current Blocking Performance During Input Supply Failure