ZHCSNL2A February 2022 – May 2022 LM74502-Q1 , LM74502H-Q1
PRODUCTION DATA
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | EN/UVLO | I | EN/UVLO input. Connect to VS pin for always ON operation. Can be driven externally from a micro controller I/O. Pulling this pin low below V(ENF) makes the device enter into low Iq shutdown mode. For UVLO, connect an external resistor ladder from input supply to EN/UVLO to GND. |
2 | GND | G | Ground pin |
3 | N.C | — | No connection |
4 | VCAP | O | Charge pump output. Connect to external charge pump capacitor. |
5 | VS | I | Input power supply pin to the controller. Connect a 100-nF capacitor across VS and GND pins. |
6 | GATE | O | Gate drive output. Connect to gate of the external N-channel MOSFET. |
7 | OV | I | Adjustable overvoltage threshold input. Connect a resistor ladder across input and output. When the voltage at OV pin exceeds the overvoltage cutoff threshold, then the GATE is pulled low. GATE turns ON when the OV pin voltage goes below the OV protection falling threshold. Connect OV pin to GND if OV feature is not used. |
8 | SRC | I | Source pin. Connect to common source point of external back-to-back connected N-channel MOSFETs or the source pin of the high side switch MOSFET. |