Basic redundant power architecture comprises of two or more voltage or power supply sources driving a single load. In its simplest form, the OR-ing solution for redundant power supplies consists of Schottky OR-ing diodes that protect the system against an input power supply fault condition. A diode OR-ing device provides effective and low cost solution with few components. However, the diodes forward voltage drops affects the efficiency of the system permanently, since each diode in an OR-ing application spends most of its time in forward conduction mode. These power losses increase the requirements for thermal management and allocated board space.

The LM74700-Q1 ICs combined with external N-Channel MOSFETs can be used in OR-ing Solution as shown in Figure 10-18. The forward diode drop is reduced as the external N-Channel MOSFET is turned ON during normal operation. LM74700-Q1 quickly detects the reverse current, pulls down the MOSFET gate fast, leaving the body diode of the MOSFET to block the reverse current flow. An effective OR-ing solution needs to be extremely fast to limit the reverse current amount and duration. The LM74700-Q1 devices in OR-ing configuration constantly sense the voltage difference between Anode and Cathode pins, which are the voltage levels at the power sources (V_IN1, V_IN2) and the common load point respectively. The source to drain voltage VDS for each MOSFET is monitored by the Anode and Cathode pins of the LM74700-Q1. A fast comparator shuts down the Gate Drive through a fast Pull-Down within 0.45 μs (typical) as soon as V_(IN) – V_(OUT) falls below –11 mV. It turns on the Gate with 11-mA gate charge current once the differential forward voltage V_(IN) – V_(OUT) exceeds 50 mV.

Figure 10-18 Typical OR-ing Application

Figure 10-12 to Figure 10-15 show the smooth switch over between two power supply rails V_IN1 at 12 V and V_IN2 at 15 V. Figure 10-16 and Figure 10-17 illustrate the performance when V_IN2 fails. LM74700-Q1 controlling V_IN2 power rail turns off quickly, so that the output remains uninterrupted and V_IN1 is protected from V_IN2 failure.