ZHCSLA3A May 2020 – December 2020 LM7481-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY VOLTAGE | ||||||
| V(VS) | Operating input voltage | 3 | 65 | V | ||
| V(VS_PORR) | VS POR threshold, rising | 2.4 | 2.6 | 2.85 | V | |
| V(VS_PORF) | VS POR threshold, falling | 1.9 | 2.1 | 2.3 | V | |
| I(SHDN) | SHDN current, I(GND) | V(EN/UVLO) = 0 V | 2.87 | 5 | µA | |
| I(Q) | Total System Quiescent current, I(GND) | V(EN/UVLO) = 2 V | 396 | µA | ||
| V(A) = V(VS) = 24 V, V(EN/UVLO) = 2 V | 408 | 480 | µA | |||
| I(REV) | I(A) leakage current during Reverse Polarity, | 0 V ≤ V(A) ≤ – 65 V | 19 | 112 | µA | |
| I(OUT) leakage current during Reverse Polarity | 1 | µA | ||||
| ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ||||||
| V(UVLOR) | EN/UVLO threshold voltage, rising | 1.195 | 1.231 | 1.267 | V | |
| V(UVLOF) | EN/UVLO threshold voltage, falling | 1.091 | 1.132 | 1.159 | V | |
| V(ENF) | Enable threshold voltage for low Iq shutdown, falling | 0.3 | 0.67 | 0.93 | V | |
| V(EN_Hys) | Enable Hysteresis | 37 | 72 | 95 | mV | |
| I(EN/UVLO) | 0 V ≤ V(EN/UVLO) ≤ 65 V | 52 | 200 | nA | ||
| OVER VOLTAGE PROTECTION AND BATTERY SENSING (VSNS, SW, OV) INPUT | ||||||
| R(SW) | Battery sensing disconnect switch resistance | 3 V ≤ V(SNS) ≤ 65 V | 10 | 19.5 | 46 | Ω |
| V(OVR) | Overvoltage threshold input, rising | 1.195 | 1.231 | 1.267 | V | |
| V(OVF) | Overvoltage threshold input, falling | 1.091 | 1.13 | 1.159 | V | |
| I(OV) | OV Input leakage current | 0 V ≤ V(OV) ≤ 65 V | 53 | 200 | nA | |
| CHARGE PUMP (CAP) | ||||||
| I(CAP) | Charge Pump source current (Charge pump on) | V(CAP) – V(A) = 7 V, 6 V ≤ V(S) ≤ 65 V | 2.5 | 3.8 | mA | |
| VCAP – VS | Charge Pump Turn ON voltage | 11 | 12.2 | 13.2 | V | |
| Charge Pump Turnoff voltage | 11.9 | 13.2 | 14.1 | V | ||
| V(CAP UVLO) | Charge Pump UVLO voltage threshold, rising | 5.4 | 6.6 | 7.9 | V | |
| Charge Pump UVLO voltage threshold, falling | 4.4 | 5.5 | 6.6 | V | ||
| IDEAL DIODE (A, C, DGATE) | ||||||
| V(A_PORR) | V(A) POR threshold, rising | 2.2 | 2.35 | 2.6 | V | |
| V(A_PORF) | V(A) POR threshold, falling | 2 | 2.2 | 2.4 | V | |
| V(AC_REG) | Regulated Forward V(A)–V(C) Threshold | 5.8 | 9.1 | 12.4 | mV | |
| V(AC_REV) | V(A)–V(C) Threshold for Fast Reverse Current Blocking | –6.4 | –4 | –1.3 | mV | |
| V(AC_FWD) | V(A)–V(C) Threshold for Reverse to Forward transition | 150 | 177 | 200 | mV | |
| V(DGATE) – V(A) | Gate Drive Voltage | 3 V < V(S) < 5 V | 7 | V | ||
| 5 V < V(S) < 65 V | 10 | 11.5 | 13 | V | ||
| I(DGATE) | Peak Gate Source current | V(A) – V(C) = 100 mV, V(DGATE) – V(A) = 1 V | 60 | mA | ||
| Peak Gate Sink current | V(A) – V(C) = –12 mV, V(DGATE) – V(A) = 11 V | 2670 | mA | |||
| Regulation sink current | V(A) – V(C) = 0 V, V(DGATE) – V(A) = 11 V | 8.4 | 14.9 | µA | ||
| I(C) | Cathode leakage Current | V(A) = –14 V, V(C) = 12 V | 4 | 9 | 32 | µA |
| HIGH SIDE CONTROLLER (HGATE, OUT, SNS, SW, OV) | ||||||
| V(HGATE) – V(OUT) | Gate Drive Voltage | 3 V < V(S) < 5 V | 7 | V | ||
| 5 V < V(S) < 65 V | 10 | 11.1 | 14.5 | V | ||
| I(HGATE) | Source Current | 39 | 55 | 75 | µA | |
| Sink Current | V(OV) > V(OVR) | 168 | 260 | mA | ||