7.5.1 Serial Interface

A serial interface is used to write and read the configuration registers. The interface is a four wire interface using SCLK, SEN, SDI, and SDO connections. The serial interface clock (SCLK) must be less than the main input clock (INCLK) for INCLK speeds of less than 20 MHz, for INCLK speeds greater than 20-MHz SCLK must remain below 20 MHz. The main input clock (INCLK) to the LM98640QML-SP must be active during all Serial Interface commands. The Serial Interface pins are high impedance while SEN is high, this allows multiple slave devices to be used with a single master device.

After power-up, all configuration registers must be written, using the serial interface, to place the part in a valid state.

Default registers must be written to the baseline values.

Be sure to set the INCLK Range (2x05) and Sample & Hold (0x06) registers for the sample rate being used.

Write the Clock Monitor (0x09) register after the Test & Scan Control (3x0D) register.