CMOS devices tend to be susceptible to latch-up as a result of the internal, parasitic, silicon-controlled rectifier (SCR) effects. The input and output (I/O) pins look similar to the gate of the SCR. A minimum current is required to trigger the SCR gate lead. Use some resistive method to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latch-up mode. Limiting current to the supply pins also inhibits latch-up susceptibility.