ZHCSG61B march 2017 – april 2023 LMG1205
PRODUCTION DATA
The LMG1205 has an undervoltage lockout (UVLO) on both the VDD and bootstrap supplies. When the VDD voltage is below the threshold voltage of 3.8 V, both the HI and LI inputs are ignored, to prevent the GaN FETs from being partially turned on. Also, if there is insufficient VDD voltage, the UVLO actively pulls the LOL and HOL low. When the VDD voltage is above its UVLO threshold, but the HB to HS bootstrap voltage is below the UVLO threshold of 3.2 V, only HOL is pulled low. Both UVLO threshold voltages have 200 mV of hysteresis to avoid chattering.
| CONDITION (VHB-HS > VHBR for all cases below) | HI | LI | HO | LO |
|---|---|---|---|---|
| VDD - VSS < VDDR during device start-up | H | L | L | L |
| VDD - VSS < VDDR during device start-up | L | H | L | L |
| VDD - VSS < VDDR during device start-up | H | H | L | L |
| VDD - VSS < VDDR during device start-up | L | L | L | L |
| VDD - VSS < VDDR - VDDH after device start-up | H | L | L | L |
| VDD - VSS < VDDR - VDDH after device start-up | L | H | L | L |
| VDD - VSS < VDDR - VDDH after device start-up | H | H | L | L |
| VDD - VSS < VDDR - VDDH after device start-up | L | L | L | L |
| CONDITION (VDD > VDDR for all cases below) | HI | LI | HO | LO |
|---|---|---|---|---|
| VHB-HS < VHBR during device start-up | H | L | L | L |
| VHB-HS < VHBR during device start-up | L | H | L | H |
| VHB-HS < VHBR during device start-up | H | H | L | H |
| VHB-HS < VHBR during device start-up | L | L | L | L |
| VHB-HS < VHBR - VHBH after device start-up | H | L | L | L |
| VHB-HS < VHBR - VHBH after device start-up | L | H | L | H |
| VHB-HS < VHBR - VHBH after device start-up | H | H | L | H |
| VHB-HS < VHBR - VHBH after device start-up | L | L | L | L |