7.3.3 Dead Time Selection

In PWM mode the dead time can be set with a resistor placed between DHL/DLH and V_SS. For a desired dead time (t_dt), the corresponding required resistance can be calculated in Equation 4 with t_dt in ns and R_ext in kΩ.

The maximum dead time is 20 ns, which gives a minimum resistor value of 20 kΩ. The minimum dead time is 0.5ns, which gives a maximum resistor value of 1.8 MΩ. There is an internal pull-up resistor at DHL/DLH pin, which forms a voltage divider with the external resistor. This voltage decides the final dead time. The calculation between dead time t_DT in ns and V_DT is shown in Equation 5.

Before being used to generate the dead times, the voltages on the DHL and DLH pins are first filtered through an internal RC filter with a nominal corner frequency of 10 kHz to attenuate switching noise.

The pulse widths of the HO and LO outputs are decreased from the PWM input by the chosen dead-times. The timing diagram under no load condition is shown in Figure 13 and Figure 14. PWM mode and Independent mode configurations can be found in Figure 16 .