SNOSDJ1A July 2024 – October 2024 LMG2100R026
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
Figure 8-1 shows a synchronous buck converter application with VCC connected to a 5V supply. It is critical to optimize the power loop (loop impedance from VIN capacitor to PGND). Having a high power loop inductance causes significant ringing in the SW node and also causes the associated power loss. The LMG2100R026 has VIN and PGND pins next to each other. This enables the VIN capacitor to be placed very close to LMG2100R026 on the top layer of the PCB, minimizing power loop inductance.