The LMG342xR050 is a high-performance power GaN device with integrated gate driver. The GaN device offers zero reverse recovery and ultra-low output capacitance, which enables high efficiency in bridge-based topologies. Direct Drive architecture is applied to control the GaN device directly by the integrated gate driver. This architecture provides superior switching performance compared to the traditional cascode approach and helps solve a number of challenges in GaN applications.

The integrated driver ensures the device stays off for high drain slew rates. The integrated driver also protects the GaN device from overcurrent, short-circuit, undervoltage, and overtemperature. Regarding fault signal reporting, LMG342xR050 provides different reporting method which is shown in Table 9-1. Refer to Fault Detection for more details. The integrated driver is also able to sense the die temperature and send out the temperature signal through a modulated PWM signal.

Unlike Si MOSFETs, GaN devices do not have a p-n junction from source to drain and thus have no reverse recovery charge. However, GaN devices still conduct from source to drain similar to a p-n junction body diode, but with higher voltage drop and higher conduction loss. Therefore, source-to-drain conduction time must be minimized while the LMG342xR050 GaN FET is turned off. The ideal-diode mode feature in the LMG3425R050 automatically minimizes the source-to-drain conduction loss that occur on the GaN FET soft-switched turn-on edge, similar to optimum dead-time control.