ZHCSIC8B April 2016 – June 2018 LMH0324
PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
By default, the LMH0324 input-to-output signal flow and data rate selection are configured by the IN_OUT_SEL pin logic settings shown in Table 2. These settings can be overridden via register control by applying the appropriate override bit values.
LEVEL | DEFINITION |
---|---|
H | IN0 to OUT0 and OUT1 |
F | IN0 to OUT0 (with OUT1 disabled) |
R | Reserved |
L | Reserved |