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SNLS323N August 2010 – January 2017 LMH0395

PRODUCTION DATA.

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机械数据 (封装 | 引脚)

RTW|24
- MPQF167C

散热焊盘机械数据 (封装 | 引脚)

RTW|24
- QFND450A

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

	MIN	MAX	UNIT
Supply voltage		3.1	V
Input voltage (all inputs)	-0.3	V_CC+0.3	V
Junction temperature		+125	°C
Storage temperature, T_stg	-65	+150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±6000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±2000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
V_CC – V_EE	Supply voltage	2.375	2.5	2.625	V
	Input coupling capacitance		1		µF
T_A	Operating free-air temperature	-40	25	+85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LMH0395	UNIT
		RTW (WQFN)
		24 PINS
R_θJA	Junction-to-ambient thermal resistance	40	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	6	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 DC Electrical Characteristics

over operating free-air temperature range (unless otherwise noted).⁽¹⁾⁽²⁾⁽³⁾⁽⁴⁾⁽⁵⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IH	Input voltage high level	Logic Inputs	1.7		V_CC	V
V_IL	Input voltage low level	Logic Inputs	V_EE		0.7	V
V_SDI	Input voltage swing	0-m cable length⁽³⁾ SDI	720	800	880	mV_P−P
V_CMIN	Input common-mode voltage	SDI or SDI		1.65		V
V_SSP-P	Differential output voltage, P-P	SDO0, SDO0, SDO1, SDO1 (100-Ω load), default register settings ⁽⁴⁾ , Figure 1	500	700	900	mV_P-P
V_OD	Differential output voltage		250	350	450	mV
ΔV_OD	Change in magnitude of V_OD for complementary output states				50	mV
V_OS	Offset voltage		1.1	1.2	1.35	V
ΔV_OS	Change in magnitude of V_OS for complementary output states				50	mV
I_OS	Output short circuit current				30	mA
MUTE_REF	MUTE_REF DC voltage (floating)			1.3		V
MUTE_RNG	MUTE_REF range			0.8		V
V_OH	Output voltage high level	CD, MISO, I_OH = –2 mA	2			V
V_OL	Output voltage low level	CD, MISO, I_OL = +2 mA			0.2	V
I_CC	Supply current	Normal operation, dual outputs⁽⁵⁾		55	78	mA
		Normal operation, single output⁽⁵⁾		45	65	mA
		Power-save mode		7	10	mA

(1) Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0 Volts.

(2) Typical values are stated for VCC = +2.5 V and TA = +25°C.

(3) The LMH0395 can be optimized for different launch amplitudes through the SPI.

(4) The differential output voltage and offset voltage are adjustable through the SPI.

(5) Typical ICC is measured with a 2.97-Gbps input signal.

6.6 AC Electrical Characteristics

over supply voltage and operating temperature ranges, unless otherwise specified⁽¹⁾.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
BR_MIN	Minimum input data rate (SDI, SDI)			125		Mbps
BR_MAX	Maximum input data rate (SDI, SDI)				2970	Mbps
TJ_RAW	Jitter for various cable lengths	2.97 Gbps, Belden 1694A, 0-100 meters⁽⁴⁾⁽⁶⁾			0.2	UI
		2.97 Gbps, Belden 1694A, 100-140 meters⁽⁴⁾⁽⁶⁾			0.3	UI
		2.97 Gbps, Belden 1694A, 140-180 meters⁽⁴⁾⁽⁶⁾			0.5	UI
		2.97 Gbps, Belden 1694A, 180-200 meters		0.55		UI
		1.485 Gbps, Belden 1694A, 0-200 meters⁽⁴⁾⁽⁶⁾			0.2	UI
		1.485 Gbps, Belden 1694A, 200-220 meters		0.3		UI
		270 Mbps, Belden 1694A, 0-400 meters⁽⁴⁾⁽⁶⁾			0.3	UI
t_r, t_f	Output rise time, fall time (SDO0, SDO0, SDO1, SDO1)	20% – 80%, 100-Ω load, Figure 1⁽²⁾		90	130	ps
ΔT_R-F	Mismatch in rise/fall time (SDO0, SDO0, SDO1, SDO1)	SDO0, SDO0, SDO1, SDO1See⁽²⁾		2	15	ps
t_OS	Output overshoot (SDO0, SDO0, SDO1, SDO1)	SDO0, SDO0, SDO1, SDO1See⁽²⁾		1%	5%
RL_IN	Input return loss (SDI, SDI)	5 MHz - 1.5 GHz⁽⁵⁾	15			dB
RL_IN	Input return loss (SDI, SDI)	1.5 GHz - 3.0 GHz⁽⁵⁾	10			dB
R_IN	Input resistance (SDI, SDI,)	Single-ended		1.5		kΩ
C_IN	Input capacitance (SDI, SDI)	Single-ended		0.7		pF

6.7 Switching Characteristics for SPI Interface

over supply voltage and operating temperature ranges, unless otherwise specified ⁽¹⁾.

PARAMETER		TEST CONDITIONS	MAX	UNIT
t_ODZ	MISO driven-to-tristate time	MISO, see Figure 3	20	ns
t_OZD	MISO tristate-to-driven time		10	ns
t_OD	MISO output delay time		15	ns

(1) Typical values are stated for V_CC = +2.5 V and T_A = +25°C.

6.8 Timing Requirements for SPI Interface

over supply voltage and operating temperature ranges, unless otherwise specified ⁽¹⁾.

		TEST CONDITIONS	MIN	MAX	UNIT
f_SCK	Frequency	SCK		20	MHz
t_PH	SCK pulse width high	SCK, see Figure 2, Figure 3	40		% SCK period
t_PL	SCK pulse width low	SCK, see Figure 2, Figure 3	40		% SCK period
t_SU	MOSI set-up time	MOSI, see Figure 2, Figure 3	4		ns
t_H	MOSI hold time	MOSI, see Figure 2, Figure 3	4		ns
t_SSSU	SS set-up time	SS, see Figure 2, Figure 3	14		ns
t_SSH	SS hold time		4		ns
t_SSOF	SS OFF-time		1		SCK period

(1) Typical values are stated for V_CC = +2.5 V and T_A = +25°C.

(2) Specification is ensured by characterization.

(3) The LMH0395 can be optimized for different launch amplitudes through the SPI.

(4) Based on design and characterization data over the full range of recommended operating conditions of the device. Jitter is measured in accordance with ST RP 184, ST RP 192, and the applicable serial data transmission standard: ST 424, ST 292, or ST 259.

(5) Input return loss is dependent on board design. The LMH0395 exceeds this specification on the SD395EVK evaluation board with a return loss network consisting of a 5.6-nH inductor in parallel with a 75-Ω series resistor on the input.

(6) Due to SMPTE naming convention, all SMPTE Engineering Documents will be numbered as a two-letter prefix and a number. Documents and references with the same root number and year are functionally identical; for example ST 424-2006 and SMPTE 424M-2006 refer to the same document.

Figure 1. LVDS Output Voltage, Offset, and Timing Parameters

Figure 2. SPI Write

Figure 3. SPI Read

6.9 Typical Characteristics

Figure 4. Differential Serial Data Output After Equalizing 2 Meters of Belden 1694A at 2.97 Gbps, PRBS10

Figure 5. Differential Serial Data Output After Equalizing 170 Meters of Belden 1694A at 2.97 Gbps, PRBS10