ZHCSMW3A December   2020  – November 2021 LMH32404-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Clamping and Input Protection
      2. 7.3.2 ESD Protection
      3. 7.3.3 Differential Output Stage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ambient Light Cancellation (ALC) Mode
      2. 7.4.2 Channel Multiplexer Mode
      3. 7.4.3 Low-Power Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Standard TIA Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Increase Channel Density for Optical Front-End Systems
        1. 8.2.2.1 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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Differential Output Stage

Each channel of the LMH32404-Q1 has a differential output stage that performs two functions that are common across all differential amplifiers. This stage does the following:

  1. Converts the single-ended output from the TIA stage to a differential output.
  2. Performs a common-mode output shift to match the specified ADC input common-mode voltage.

The VOD pin is functional only when the LMH32404-Q1 device is used with a PD that sinks the photocurrent. Set VOD = 0 V when the LMH32404-Q1 device is interfaced with a PD that sources the photocurrent. The differential output stage has two 10-Ω series resistors on its output to isolate the amplifier output stage transistors from the package bond-wire inductance and printed circuit board (PCB) capacitance. The net gain of the LMH32404-Q1 (TIA plus the output stage) is 20 kΩ per channel when driving an external 100-Ω resistor. When the external load resistor is increased above 100 Ω, the effective gain from the IN pin to the differential output pin increases. Consequently, when the external load resistor is decreased to less than 100 Ω, the effective gain from the IN pin to the differential output pin decreases as a result of the larger voltage drop across the two internal 10-Ω resistors. The effective TIA gain is 24 kΩ when there is no load resistor between the OUT+ and OUT– pins.

The output common-mode voltage of the LMH32404-Q1 can be set externally through the VOCM pin. A resistor divider internal to the amplifier, between VDD2 and ground sets the default voltage to 1.1 V. The internal resistors generate common-mode noise that is typically rejected by the CMRR of the subsequent ADC stage. To maximize the amplifier SNR, place an external noise bypass capacitor to ground on the VOCM pin. In single-ended signal chains, such as ToF systems that use time-to-digital converters (TDCs), only a single output per channel of the LMH32404-Q1 is needed. In such situations, terminate the unused differential output in the same manner as the used output to maintain balance and symmetry. The signal swing of the single-ended output is half the available differential output swing. Additionally, the common-mode noise of the output stage, which is typically rejected by the differential input ADC, is now added to the total noise, further degrading SNR.

The output stage of the LMH32404-Q1 has an additional VOD input that sets the differential output between OUT– and OUT+. Figure 7-1 shows how each output pin of the LMH32404-Q1 is at the voltage set by the VOCM pin (default = 1.1 V) when the photodiode output current is zero and the VOD input is set to 0 V. When the VOD pin is driven to a voltage of X volts, the two output pins are separated by X volts when the photodiode current is zero. The average voltage is still equal to VOCM. For example, Figure 7-2 shows how if VOCM is set to 1.1 V and VOD is set to 0.4 V, then OUT– = 1.1 V + 0.2 V = 1.3 V and OUT+ = 1.1 V – 0.2 V = 0.9 V.

The VOD output offset feature is included in the LMH32404-Q1 because the output current of a photodiode is unipolar. Depending on the reverse bias configuration, a photodiode can either sink or source current, but cannot do both at the same time. With the anode connected to a negative bias and the cathode connected to the TIA stage input, the photodiode can only sink current, which implies that the TIA stage output swings in a positive direction above its default input bias voltage. Subsequently, OUT– only swings below VOCM and OUT+ only swings above VOCM. Figure 7-1 shows how the with VOD = 0 V, the LMH32404-Q1 only uses half its output swing range (VOUT = VOUT+ – VOUT–), because one output never swings below VOCM and the other output never goes above VOCM. The signal dynamic range in this case is 0.4 VPP – 0 V = 0.4 VPP.

Figure 7-2 shows how the VOD pin voltage allows OUT– to be level-shifted above VOCM, and OUT+ to be level-shifted below VOCM to maximize the output swing capabilities of the amplifier. The signal dynamic range in this case is 0.4 VPP − (-0.4 VPP) = 0.8 VPP.

GUID-EDE8D1C3-7F99-48D8-913D-2589A8C84C5A-low.gifFigure 7-1 Single-Ended Outputs With VOD = 0 V
GUID-4EFD0660-07E3-4A85-9252-F9D62B6B2494-low.gifFigure 7-2 Single-Ended Outputs With VOD = 0.4 V

When the LMH32404-Q1 drives a 100-Ω load, the voltage set at the VOD pin is equal to the differential output offset (VOUT = VOUT+ – VOUT–) when the input signal current is zero. Use Equation 1 to calculate the differential output offset under other load conditions.

Equation 1.

where

  • VOD = Voltage applied at pin 10
  • VOD = (VOUT– – VOUT+)
  • RL = External load resistance