ZHCSCR0A August   2014  – December 2014 LMH3401

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 5 V
    6. 7.6 Electrical Characteristics: VS = 3.3 V
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1  Output Reference Points
    2. 8.2  ATE Testing and DC Measurements
    3. 8.3  Frequency Response
    4. 8.4  S-Parameters
    5. 8.5  Frequency Response with Capacitive Load
    6. 8.6  Distortion
    7. 8.7  Noise Figure
    8. 8.8  Pulse Response, Slew Rate, Overdrive Recovery
    9. 8.9  Power Down
    10. 8.10 VCM Frequency Response
    11. 8.11 Test Schematics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully-Differential Amplifier
      2. 9.3.2 Single-Ended to Differential Signals
        1. 9.3.2.1 Resistor Design Equations for Single-to-Differential Applications
        2. 9.3.2.2 Input Impedance Calculations
      3. 9.3.3 Differential to Differential Signals
      4. 9.3.4 Output Common-Mode Voltage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation with a Split Supply
      2. 9.4.2 Operation with a Single Supply
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Input and Output Headroom Considerations
      2. 10.1.2 Noise Analysis
      3. 10.1.3 Thermal Considerations
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Driving Matched Loads
        2. 10.2.2.2 Driving Capacitive Loads
        3. 10.2.2.3 Driving ADCs
          1. 10.2.2.3.1 SNR Considerations
          2. 10.2.2.3.2 SFDR Considerations
          3. 10.2.2.3.3 ADC Input Common-Mode Voltage Considerations—AC-Coupled Input
          4. 10.2.2.3.4 ADC Input Common-Mode Voltage Considerations—DC-Coupled Input
        4. 10.2.2.4 GSPS ADC Driver
        5. 10.2.2.5 Common-Mode Voltage Correction
        6. 10.2.2.6 Active Balun
        7. 10.2.2.7 Application Curves
    3. 10.3 Do's and Don'ts
      1. 10.3.1 Do:
      2. 10.3.2 Don't:
  11. 11Power-Supply Recommendations
    1. 11.1 Supply Voltage
    2. 11.2 Single Supply
    3. 11.3 Split Supply
    4. 11.4 Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 器件命名规则
    2. 13.2 文档支持
      1. 13.2.1 相关文档 
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 术语表
  14. 14机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

12 Layout

12.1 Layout Guidelines

With 7 GHz of bandwidth, layout for the LMH3401 is critical and nothing can be neglected. In order to simplify board design, the LMH3401 has on-chip resistors that reduce the impact of off-chip capacitance. For this reason, TI recommends that the ground layer below the LMH3401 not be cut. The recommendation not to cut the ground plane under the amplifier input and output pins is different than many other high-speed amplifiers, but the reason is that parasitic inductance is more harmful to the LMH3401 performance than parasitic capacitance. By leaving the ground layer under the device intact, parasitic inductance of the output and power traces is minimized. The DUT portion of the evaluation board layout is illustrated in Figure 71 and Figure 72.

The EVM uses long edge capacitors for the decoupling capacitors, which reduces series resistance and increases the resonant frequency. Vias are also placed to the power planes before the bypass capacitors. Although not evident in the top layer, two vias are used at the capacitor in addition to the two vias underneath the device.

The output matching resistors are 0402 size and are placed very close to the amplifier output pins, which reduces both parasitic inductance and capacitance. The use of 0603 output matching resistors produces a measurable decrease in bandwidth.

When the signal is on a 50-Ω controlled impedance transmission line, the layout then becomes much less critical. The transition from the 50-Ω transmission line to the amplifier pins is the most critical area.

The CM pin also requires a bypass capacitor. Place this capacitor near the device. Refer to the user guide LMH3401EVM Evaluation Module (SBOU124) for more details on board layout and design.

12.2 Layout Example

ai_Amp_layout_zoom_bos695.pngFigure 71. Layout Example
ai_Amp_layout_GND_bos695.pngFigure 72. EVM Layout Ground Layer Showing Solid Ground Plane