at V_DD = 3.3 V, C_PD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), R_L = 100 Ω, and T_A = 25°C (unless otherwise noted)

VOUT = 100 mVPP

Figure 5-1 Small-Signal Response vs Input Capacitance

VOUT = 100 mVPP

Figure 5-3 Small-Signal Response vs Ambient Temperature

IDC_IN = 100 μA

Figure 5-5 Low-side Frequency Response vs Ambient Light Cancellation

Figure 5-7 Input Noise Density vs Ambient Temperature

IDC_EN = 0 V

Figure 5-9 Input Noise Density vs Ambient Light DC Current

Figure 5-11 Overloaded Pulse Response

Figure 5-13 Turn-Off Time

IDC_IN = 100 µA → 0 µA

Figure 5-15 Ambient Loop Cancellation Settling Time

Figure 5-17 Input Bias Voltage vs Supply Voltage

Figure 5-19 Quiescent Current vs Ambient Temperature

Figure 5-21 Output Voltage vs Input Current

μ = 21.1 mA, σ = 0.38 mA

Figure 5-23 Quiescent Current Distribution

μ = 0.99 V, σ = 0.0073 V

Figure 5-25 Default Output Voltage Distribution

μ = 1.6 kΩ, σ = 0.013 kΩ, device disabled

Figure 5-27 Output Impedance (Z_OUT) Distribution

VOUT = 1 VPP

Figure 5-2 Large-Signal Response vs Input Capacitance

VOUT = 1 VPP

Figure 5-4 Large-Signal Response vs Ambient Temperature

Figure 5-6 Closed-Loop Output Impedance vs Frequency

Figure 5-8 Input Noise Density vs Input Capacitance

Figure 5-10 Pulse Response vs Output Swing

Figure 5-12 Turn-On Time

IDC_IN = 0 µA → 100 µA

Figure 5-14 Ambient Loop Cancellation Settling Time

Positive current is sinking current into the photodiode cathode

Figure 5-16 Transimpedance Gain vs Input Current

Figure 5-18 Input Bias Voltage vs Ambient Temperature

Figure 5-20 Quiescent Current vs Supply Voltage

Figure 5-22 Logic Threshold vs Ambient Temperature

μ = 38.5 kΩ, σ = 1.2 kΩ

Figure 5-24 Transimpedance Gain Distribution

μ = 11 Ω, σ = 0.38 Ω, device enabled

Figure 5-26 Output Impedance (Z_OUT) Distribution