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SNOSB18I April 2010 – December 2014 LMH6629

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

NGQ|8
- MPDS403A
DBV|5
- MPDS018T

散热焊盘机械数据 (封装 | 引脚)

订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾⁽²⁾⁽³⁾

	MIN	MAX	UNIT
Positive Supply Voltage	−0.5	6.0	V
Differential Input Voltage		3	V
Input current		±10	mA
Analog Input Voltage		−0.5 to V_S	V
Digital Input Voltage		−0.5 to V_S	V
Junction Temperature		+150	°C
Storage Temperature (T_stg)	−65	+150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

(3) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T_J > T_A.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
		Machine model	±200
		Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±750

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. Pins listed as ±750 V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

		MIN	NOM	MAX	UNIT
Supply Voltage (V⁺ - V⁻)		2.7		5.5	V
Operating Temperature Range		−40		+125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		DBV	NGQ08A	UNIT
THERMAL METRIC⁽¹⁾		5 PINS	8 PINS	UNIT
R_θJA	Junction-to-ambient thermal resistance	179	71	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics 5V

The following specifications apply for single supply with V_S = 5 V, R_L = 100 Ω terminated to 2.5 V, gain = 10V/V, V_O = 2V_PP, V_CM = V_S/2, COMP Pin = HI (WSON-8 package), unless otherwise noted.⁽²⁾

	PARAMETER	TEST CONDITIONS		T_A = 25°C			UNIT
	PARAMETER	TEST CONDITIONS		MIN⁽²⁾	TYP⁽³⁾	MAX⁽²⁾	UNIT
DYNAMIC PERFORMANCE
SSBW	Small Signal −3dB bandwidth	V_O = 200 mV_PP, WSON-8 package			900		MHz
		V_O = 200 mV_PP, SOT-23-5 package			1000
		A_V= 4, V_O = 200 mV_PP, COMP Pin = LO			800
LSBW	Large signal −3dB bandwidth	V_O = 2V_PP			380		MHz
LSBW	Large signal −3dB bandwidth	COMP Pin = LO, A_V= 4, V_O = 2V_PP			190		MHz
	0.1 dB bandwidth	A_V= 10, V_O = 200 mV_PP, WSON-8 package			330		MHz
		A_V= 10, V_O = 200 mV_PP, SOT-23-5 package			190
		A_V= 4, V_O = 200 mV_PP, COMP Pin = LO			95
	Peaking	V_O = 200 mV_PP, WSON-8 package			0		dB
	Peaking	V_O = 200 mV_PP, SOT-23-5 package			2		dB
SR	Slew rate	A_V= 10, 2 V step			1600		V/μs
SR	Slew rate	A_V= 4, 2 V step, COMP Pin = LO			530		V/μs
t_r/ t_f	Rise/fall time	A_V= 10, 2 V step, 10% to 90%, WSON-8 package			0.90		ns
		A_V= 10, 2 V step, 10% to 90%, SOT-23-5 package			0.95
		A_V= 4, 2 V step, 10% to 90%, COMP Pin = LO, (Slew Rate Limited)			2.8
T_s	Settling time	A_V= 10, 1 V step, ±0.1%			42
	Overload recovery	V_IN = 1 V_PP			2
NOISE and DISTORTION
HD2	2^nd Order distortion	fc = 1 MHz, V_O = 2 V_PP			−90		dBc
		COMP Pin = LO, A_V= 4, fc = 1 MHz, V_O = 2 V_PP			−88
		fc = 10 MHz, V_O = 2 V_PP			−70
		COMP Pin = LO, fc = 10 MHz, A_V= 4 V, V_O = 2 V_PP			−65
HD3	3^rd Order distortion	fc = 1 MHz, V_O = 2V_PP			−94		dBc
		COMP Pin = LO, A_V= 4, fc = 1 MHz, V_O = 2 V_PP			−87
		fc = 10 MHz, V_O = 2 V_PP			−82
		COMP Pin = LO, fc = 10 MHz, V_O = 2V_PP			−75
OIP3	Two-tone 3^rd order intercept point	fc = 25 MHz, V_O = 2 V_PP composite			31		dBm
OIP3	Two-tone 3^rd order intercept point	fc = 75 MHz, V_O = 2 V_PP composite			27		dBm
e_n	Noise voltage	Input referred f > 1MHz			0.69		nV/√Hz
i_n	Noise current	Input referred f > 1MHz			2.6		pA/√Hz
NF	Noise figure	R_S = R_T = 50 Ω			8.0		dB
ANALOG I/O
CMVR	Input voltage range	CMRR > 70 dB, WSON-8 package		−0.30		3.8	V
CMVR	Input voltage range	CMRR > 70 dB, SOT-23-5 package			−0.30 to 3.8		V
V_O	Output voltage range	R_L = 100 Ω to V_S/2		0.89	0.82 to 4.19	4.0	V
		R_L = 100 Ω to V_S/2	-40°C ≤ T_J ≤ +125°C	0.95		3.9
		No Load		0.76	0.72 to 4.28	4.1
		No Load	-40°C ≤ T_J ≤ +125°C	0.85		4.0
I_OUT	Linear output current	V_O = 2.5 V ⁽¹⁾			250		mA
V_OS	Input offset voltage				±150	±780	µV
V_OS	Input offset voltage	-40°C ≤ T_J ≤ +125°C				±800	µV
TcV_OS	Input offset voltage temperature drift	See ⁽⁴⁾			±0.45		μV/°C
I_BI	Input bias current	See ⁽⁵⁾			−15	−23	μA
I_BI	Input bias current	See ⁽⁵⁾	-40°C ≤ T_J ≤ +125°C			−37	μA
I_OS	Input offset current				±0.1	±1.8	μA
I_OS	Input offset current	-40°C ≤ T_J ≤ +125°C				±3.0	μA
T_CI_OS	Input offset voltage temperature drift	See ⁽⁴⁾			±2.8		nA/°C
C_CM	Input capacitance	Common Mode			1.7		pF
C_DIFF	Input capacitance	Differential Mode⁽⁶⁾			4		pF
R_CM	Input resistance	Common Mode			450		kΩ
MISCELLANEOUS PARAMETERS
CMRR	Common mode rejection ratio	V_CM from 0 V to 3.7 V, WSON-8 package		82	87		dB
		V_CM from 0 V to 3.7 V, WSON-8 package	-40°C ≤ T_J ≤ +125°C	70
		V_CM from 0 V to 3.7 V, SOT-23-5 package			87
PSRR	Power supply rejection ratio			81	83
PSRR	Power supply rejection ratio	-40°C ≤ T_J ≤ +125°C		78
A_VOL	Open loop gain	WSON-8 package		74	78
		WSON-8 package	-40°C ≤ T_J ≤ +125°C	72
		SOT-23-5 package			78
DIGITAL INPUTS/TIMING
V_IL	Logic low-voltage threshold	PD and COMP pins, WSON-8 package				0.8	V
V_IH	Logic high-voltage threshold	PD and COMP pins, WSON-8 package		2.5			V
I_IL	Logic Low-bias current	PD and COMP pins = 0.8 V, WSON-8 package⁽⁵⁾		−23	−28	−34	µA
I_IL	Logic Low-bias current	PD and COMP pins = 0.8 V, WSON-8 package⁽⁵⁾	-40°C ≤ T_J ≤ +125°C	−19		−38
I_IH	Logic High-bias current	PD and COMP pins = 2.5 V, WSON-8 package⁽⁵⁾		−16	−22	−27
I_IH	Logic High-bias current	PD and COMP pins = 2.5 V, WSON-8 package⁽⁵⁾	-40°C ≤ T_J ≤ +125°C	−14		−29
T_en	Enable time	WSON-8 package			75		ns
T_dis	Disable time	WSON-8 package			80		ns
POWER REQUIREMENTS
I_S	Supply current	No Load, Normal Operation (PD Pin = HI or open for WSON-8 package)			15.5	16.7	mA
			-40°C ≤ T_J ≤ +125°C			18.2
		No Load, Shutdown (PD Pin =LO for WSON-8 package)			1.1	1.85
		No Load, Shutdown (PD Pin =LO for WSON-8 package)	-40°C ≤ T_J ≤ +125°C			2.0

(1) The maximum continuous output current (I_OUT) is determined by device power dissipation limitations. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C

(2) All limits are ensured by testing or statistical analysis

(3) Typical numbers are the most likely parametric norm.

(4) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

(5) Negative input current implies current flowing out of the device

(6) Simulation results.

6.6 Electrical Characteristics 3.3V

The following specifications apply for single supply with V_S = 3.3 V, R_L = 100 Ω terminated to 1.65 V, gain = 10V/V, V_O = 1 V_PP, V_CM = V_S/2, COMP Pin = HI (WSON-8 package), unless otherwise noted.⁽²⁾

	PARAMETER	TEST CONDITIONS		T_A = 25°C			UNIT
	PARAMETER	TEST CONDITIONS		MIN⁽⁴⁾	TYP⁽⁵⁾	MAX⁽⁴⁾	UNIT
DYNAMIC PERFORMANCE
SSBW	Small signal −3dB bandwidth	V_O = 200 mV_PP, WSON-8 package			820		MHz
		V_O = 200 mV_PP, SOT-23-5 package			950
		COMP Pin = LO, A_V= 4, V_O = 200 mV_PP			730
LSBW	Large signal −3dB bandwidth	V_O = 1V_PP			540		MHz
LSBW	Large signal −3dB bandwidth	COMP Pin = LO, A_V= 4, V_O = 1V_PP			320		MHz
	0.1 dB Bandwidth	A_V= 10, V_O = 200 mV_PP, WSON-8 package			330		MHz
		A_V= 10, V_O = 200 mV_PP, SOT-23-5 package			190
		COMP Pin = LO, A_V= 4, V_O = 200 mV_PP			85
	Peaking	V_O = 200 mV_PP, WSON-8 package			0		dB
	Peaking	V_O = 200 mV_PP, SOT-23-5 package			1.8		dB
SR	Slew rate	A_V= 10, 1.3V step			1100		V/µs
SR	Slew rate	COMP Pin = LO, A_V= 4, 1.3V step			500		V/µs
t_r/ t_f	Rise/fall time	A_V= 10, 1V step, 10% to 90%, WSON-8 package			0.7		ns
		A_V= 10, 1V step, 10% to 90%, SOT-23-5 package			0.55
		A_V= 4, COMP Pin = LO, 1V step, 10% to 90% (Slew Rate Limited)			1.3
T_s	Settling time	A_V= 10, 1V step, ±0.1%			70
	Overload recovery	V_IN = 1V_PP			2
NOISE and DISTORTION
HD2	2^nd Order distortion	fc = 1MHz, V_O = 1V_PP			-82		dBc
		COMP Pin = LO, A_V= 4, fc = 1MHz, V_O = 1V_PP			-88
		fc = 10 MHz, V_O = 1V_PP			-67
		COMP Pin = LO, fc = 10 MHz, A_V= 4V, V_O = 1V_PP			-74
HD3	3^rd Order distortion	fc = 1MHz, V_O = 1V_PP			-94		dBc
		COMP Pin = LO, A_V= 4, fc = 1MHz, V_O = 1V_PP			-112
		fc = 10 MHz, V_O = 1V_PP			-79
		COMP pin = LO, fc = 10 MHz, V_O = 1V_PP			-96
OIP3	Two-tone 3^rd order intercept point	fc = 25 MHz, V_O = 1V_PP composite			30		dBm
OIP3	Two-tone 3^rd order intercept point	fc = 75 MHz, V_O = 1V_PP composite			26		dBm
e_n	Noise voltage	Input referred, f > 1MHz			0.69		nV/√Hz
i_n	Noise current	Input referred, f > 1MHz			2.6		pA/√Hz
NF	Noise figure	R_S = R_T = 50 Ω			8.0		dB
ANALOG I/O
CMVR	Input voltage range	CMRR > 70 dB, WSON-8 package		-0.30		2.1	V
CMVR	Input voltage range	CMRR > 70 dB, SOT-23-5 package			-0.30 to 2.1
V_O	Output voltage range	R_L = 100 Ω to V_S/2		0.90	0.79 to 2.50	2.4
		R_L = 100 Ω to V_S/2	-40°C ≤ T_J ≤ +125°C	0.95		2.3
		No load		0.76	0.70 to 2.60	2.5
		No load	-40°C ≤ T_J ≤ +125°C	0.80		2.4
I_OUT	Linear output current	V_O = 1.65 V⁽³⁾			230		mA
V_OS	Input offset voltage				±150	±680	µV
V_OS	Input offset voltage	-40°C ≤ T_J ≤ +125°C				±700
TcV_OS	Input offset voltage temperature drift	See ⁽⁶⁾			±1		µV/°C
I_BI	Input bias current	See ⁽⁷⁾			-15	-23	µA
I_BI	Input bias current	See ⁽⁷⁾	-40°C ≤ T_J ≤ +125°C			-35
I_OS	Input offset current				±0.13	±1.8
I_OS	Input offset current	-40°C ≤ T_J ≤ +125°C				±3.0
T_CI_OS	Input offset voltage temperature drift	See ⁽⁶⁾			±3.2		nA/°C
C_CM	Input capacitance	Common Mode			1.7		pF
C_DIFF	Input capacitance	Differential Mode⁽⁸⁾			4		pF
R_CM	Input resistance	Common Mode			1		MΩ
MISCELLANEOUS PARAMETERS
CMRR	Common mode rejection ratio	V_CM from 0 V to 2.0 V, WSON-8 package		84	87		dB
		V_CM from 0 V to 2.0 V, WSON-8 package	-40°C ≤ T_J ≤ +125°C	81
		V_CM from 0 V to 2.0 V, SOT-23-5 package			87
PSRR	Power supply rejection ratio			82	84
PSRR	Power supply rejection ratio	-40°C ≤ T_J ≤ +125°C		79
A_VOL	Open loop gain	WSON-8 package		78	79
		WSON-8 package	-40°C ≤ T_J ≤ +125°C	73
		SOT-23-5 package			79
DIGITAL INPUTS/TIMING
V_IL	Logic low-voltage threshold	PD and COMP pins, WSON-8 package				0.8	V
V_IH	Logic high-voltage threshold	PD and COMP pins, WSON-8 package		2.0			V
I_IL	Logic low-bias current	PD and COMP pins = 0.8 V, WSON-8 package⁽⁷⁾		-17	-23	-28	µA
I_IL	Logic low-bias current	PD and COMP pins = 0.8 V, WSON-8 package⁽⁷⁾	-40°C ≤ T_J ≤ +125°C	-14		-32
I_IH	Logic high-bias current	PD and COMP pins = 2.0 V, WSON-8 package⁽⁷⁾		-16	-22	-27
I_IH	Logic high-bias current	PD and COMP pins = 2.0 V, WSON-8 package⁽⁷⁾	-40°C ≤ T_J ≤ +125°C	-13		-31
T_en	Enable time	WSON-8 package			75		ns
T_dis	Disable time	WSON-8 package			80		ns
POWER REQUIREMENTS
I_S	Supply current	No Load, Normal Operation (PD Pin = HI or open for WSON-8 package)			13.7	14.9	mA
			-40°C ≤ T_J ≤ +125°C			16.0
		No Load, Shutdown (PD Pin = LO for WSON-8 package)			0.89	1.4
		No Load, Shutdown (PD Pin = LO for WSON-8 package)	-40°C ≤ T_J ≤ +125°C			1.5

(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics.

(2) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T_J > T_A.

(3) The maximum continuous output current (I_OUT) is determined by device power dissipation limitations. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C

(4) All limits are ensured by testing or statistical analysis.

(5) Typical numbers are the most likely parametric norm.

(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

(7) Negative input current implies current flowing out of the device.

(8) Simulation results.

6.7 Typical Performance Characteristics

Unless otherwise specified, V_S = ±2.5V, R_f = 240 Ω, R_L = 100 Ω, V_O = 2 V_PP, COMP pin = HI, A_V = +10 V/V, WSON-8 and SOT-23-5 packages (unless specifically noted).

Vo = 2 Vpp

Figure 1. Inverting Frequency Response

Vo = 2 Vpp

Figure 3. Non-Inverting Frequency Response

Vo = 0.2 Vpp

Figure 5. Non-Inverting Frequency Response,
WSON-8 Package

Av = 10 V/V

Figure 7. Non-Inverting Frequency Response
with Varying V_O, WSON-8 Package

Av = 10 V/V	Vs = +/-1.5 V

Figure 9. Non-Inverting Frequency Response
with Varying V_O, WSON-8 Package

Av = 4 V/V	COMP Pin = LO

Figure 11. Non-Inverting Frequency Response
with Varying V_O, WSON-8 Package

R_L = 100 Ω \|\| C_L
R_ISO as noted (measured @ C_L)

Figure 13. Frequency Response with Cap. Loading

Figure 15. Frequency Response vs. R_f, WSON-8 Package

V_S = ±1.5 V	V_O = 1 V_PP

Figure 17. Frequency Response vs. R_f, WSON-8 Package

20 MHz

Figure 19. Distortion vs. Swing, WSON-8 Package

1 MHz

Figure 21. Distortion vs. Swing, WSON-8 Package

1 MHz	Vout = 2 Vpp

Figure 23. Distortion vs. Gain, WSON-8 Package

Vo = 2 Vpp

Figure 25. Distortion vs. Frequency, WSON-8 Package

Figure 27. 3^rd Order Intermodulation Distortion
vs. Output Voltage

Figure 29. Input Noise Current vs. Frequency

Figure 31. Open Loop Gain/Phase Response

Figure 33. Output Sink Current WSON-8 Package

Figure 35. Output Sink Current, SOT-23-5 Package

A_V= 4V/V	COMP Pin = LO

Figure 37. Large Signal Step Response

Vs = 3.3 V

Figure 39. Large Signal Step Response

Vs = 3.3 V

Figure 41. Small Signal Step Response, WSON-8 Package

Figure 43. Turn-Off Waveform, WSON-8 Package

Figure 45. Offset Voltage vs. Supply Voltage
(Typical Unit)

Figure 47. Input Offset Current vs. Supply Voltage (Typical Unit)

Vo = 1 Vpp	Vs = ±1.5V

Figure 2. Inverting Frequency Response

Vo = 1 Vpp	Vs = ±1.5 V

Figure 4. Non-Inverting Frequency Response

Vo = 0.2 Vpp

Figure 6. Non-Inverting Frequency Response,
SOT-23-5 Package

Av=10 V/V

Figure 8. Non-Inverting Frequency Response
with Varying V_O, SOT-23-5 Package

Av=10 V/V	Vs= +/-1.5 V

Figure 10. Non-Inverting Frequency Response
with Varying V_O, SOT-23-5 Package

Av = 4 V/V	Vs = ±1.5 V	COMP Pin = LO

Figure 12. Non-Inverting Frequency Response
with Varying V_O, WSON-8 Package

R_L = 100 Ω \|\| C_L, A_V = 4 V/V
COMP Pin = LO
R_ISO as noted (measured @ C_L)

Figure 14. Frequency Response Cap. Loading,
WSON-8 Package

Figure 16. Frequency Response vs. R_f, SOT-23-5 Package

V_S = ± 1.5 V	V_O = 1 V_PP

Figure 18. Frequency Response vs. R_f, SOT-23-5 Package

20 MHz

Figure 20. Distortion vs. Swing, SOT-23-5 Package

1 MHz

Figure 22. Distortion vs. Swing, SOT-23-5 Package

1 MHz	Vout = 2 Vpp

Figure 24. Distortion vs. Gain, SOT-23-5 Package

Vo = 2 Vpp

Figure 26. Distortion vs. Frequency, SOT-23-5 Package

Figure 28. Input Noise Voltage vs. Frequency

Figure 30. PSRR vs. Frequency

Figure 32. Output Source Current, WSON-8 Package

Figure 34. Output Source Current, SOT-23-5 Package

Figure 36. Large Signal Step Response

Figure 38. Large Signal Step Response

Figure 40. Small Signal Step Response, WSON-8 Package

Figure 42. Turn-On Waveform, WSON-8 Package

Figure 44. Supply Current vs. Supply Voltage

Figure 46. Input Bias Current vs. Supply Voltage
(Typical Unit)