5 Pin Configuration and Functions

Figure 5-1 RTA Package40-Pin WQFNTop View

Table 5-1 Pin Functions⁽³⁾

PIN		TYPE	DESCRIPTION
NAME	NO.	TYPE	DESCRIPTION
DAP	DAP	GND	Die Attach Pad. Connect to the PCB ground plane for heat dissipation.
CLKin0	16	I	Universal clock input 0 (differential/single-ended)
CLKin0*	17	I	Universal clock input 0 (differential/single-ended)
CLKin1	34	I	Universal clock input 1 (differential/single-ended)
CLKin1*	33	I	Universal clock input 1 (differential/single-ended)
CLKoutA_EN	11	I	Bank A low active output buffer enable⁽²⁾
CLKoutA0	1	O	Differential clock output A0.
CLKoutA0*	2	O	Differential clock output A0.
CLKoutA1	4	O	Differential clock output A1.
CLKoutA1*	5	O	Differential clock output A1.
CLKoutA2	7	O	Differential clock output A2.
CLKoutA2*	8	O	Differential clock output A2.
CLKoutA3	9	O	Differential clock output A3.
CLKoutA3*	10	O	Differential clock output A3.
CLKoutB_EN	19	I	Bank B low active output buffer enable⁽²⁾
CLKoutB1	27	O	Differential clock output B1.
CLKoutB1*	26	O	Differential clock output B1.
CLKoutB0	30	O	Differential clock output B0.
CLKoutB0*	29	O	Differential clock output B0.
CLKoutB2	24	O	Differential clock output B2.
CLKoutB2*	23	O	Differential clock output B2.
CLKoutB3	22	O	Differential clock output B3.
CLKoutB3*	21	O	Differential clock output B3.
CLKin_SEL0	15	I	Clock input selection pins ⁽²⁾
CLKin_SEL1	18	I	Clock input selection pins ⁽²⁾
GND	20, 31, 40	GND	Ground
OSCin	13	I	Input for crystal. Can also be driven by a XO, TCXO, or other external single-ended clock.
OSCout	14	O	Output for crystal. Leave OSCout floating if OSCin is driven by a single-ended clock.
REFout	36	O	LVCMOS reference output. Enable output by pulling REFout_EN pin high.
REFout_EN	38	I	REFout enable input. Enable signal is internally synchronized to selected clock input.⁽²⁾
V_CC	12, 32, 35, 39	PWR	Power supply for Core and Input buffer blocks. The V_CC supply operates from 3.3 V. Bypass with a 0.1-µF low-ESR capacitor placed very close to each V_CC pin.
V_CCOA	3, 6	PWR	Power supply for Bank A Output buffers. V_CCOA can operate from 3.3 V or 2.5 V. The V_CCOA pins are internally tied together. Bypass with a 0.1-µF low-ESR capacitor placed very close to each V_CCO pin. ⁽¹⁾
V_CCOB	25, 28	PWR	Power supply for Bank B Output buffers. V_CCOB can operate from 3.3 V or 2.5 V. The V_CCOB pins are internally tied together. Bypass with a 0.1-µF low-ESR capacitor placed very close to each V_CCO pin. ⁽¹⁾
V_CCOC	37	PWR	Power supply for REFout Output buffer. V_CCOC can operate from 3.3 V or 2.5 V. Bypass with a 0.1-µF low-ESR capacitor placed very close to each V_CCO pin.⁽¹⁾

(1) The output supply voltages/pins (V_CCOA, V_CCOB, and V_CCOC) is referred to generally as V_CCO when no distinction is needed, or when the output supply can be inferred by the output bank/type.

(2) CMOS control input with internal pull-down resistor.

(3) Any unused output pins should be left floating with minimum copper length (see note in Section 8.3.3), or properly terminated if connected to a transmission line, or disabled/Hi-Z if possible. See Section 8.3.3 for output configuration or Section 9.2.2.1 output interface and termination techniques.