ZHCSJG9B
March 2019 – August 2019
LMK00804B-Q1
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
简化原理图
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
Table 1.
Absolute Maximum Ratings
Table 2.
ESD Ratings
Table 3.
Recommended Operating Conditions
Table 4.
Thermal Information
Table 5.
Power Supply Characteristics
Table 6.
LVCMOS / LVTTL DC Electrical Characteristics
Table 7.
Differential Input DC Electrical Characteristics
Table 8.
Switching Characteristics
Table 9.
Pin Characteristics
6.1
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Clock Enable Timing
8.4
Device Functional Modes
9
Applications and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Output Clock Interface Circuit
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.1.3.1
System-Level Phase Noise and Additive Jitter Measurement
9.2.2
Input Detail
9.2.3
Input Clock Interface Circuits
9.3
Do's and Don'ts
9.3.1
Power Dissipation Calculations
9.3.2
Thermal Management
9.3.3
Recommendations for Unused Input and Output Pins
9.3.4
Input Slew Rate Considerations
10
Power Supply Recommendations
10.1
Power Supply Considerations
10.1.1
Power-Supply Filtering
11
Layout
11.1
Layout Guidelines
11.1.1
Ground Planes
11.1.2
Power Supply Pins
11.1.3
Differential Input Termination
11.1.4
LVCMOS Input Termination
11.1.5
Output Termination
11.2
Layout Example
12
器件和文档支持
12.1
文档支持
12.1.1
相关文档
12.2
接收文档更新通知
12.3
社区资源
12.4
商标
12.5
静电放电警告
12.6
Glossary
13
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
RGT|16
MPQF119H
散热焊盘机械数据 (封装 | 引脚)
RGT|16
QFND583A
订购信息
zhcsjg9b_oa
zhcsjg9b_pm
11.1.5
Output Termination
Place 43-Ω series termination resistors close to the Qx outputs at the launch of the 50-Ω traces.
Avoid or minimize vias in the 50-Ω input traces to minimize impedance discontinuities.
If not used, any Qx output should be left as no connect.
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