12.1.1 Power-Supply Filtering

High-performance clock buffers are sensitive to noise on the power supply, which can dramatically increase the additive jitter of the buffer. Thus, it is essential to reduce noise from the system power supply, especially when jitter or phase noise is critical to applications.

Use of filter capacitors eliminates the low-frequency noise from power supply, where the bypass capacitors provide the very low-impedance path for high-frequency noise and guard the power-supply system against induced fluctuations. The bypass capacitors also provide instantaneous current surges as required by the device, and should have low ESR. To use the bypass capacitors properly, place them very close to the power supply terminals and lay out traces with short loops to minimize inductance. TI recommends to adding as many high-frequency (for example, 0.1 µF) bypass capacitors as there are supply terminals in the package. It is recommended, but not required, to insert a ferrite bead between the board power supply and the chip power supply to isolate the high-frequency switching noises generated by the clock driver, preventing them from leaking into the board supply. Choosing an appropriate ferrite bead with very low DC resistance is important, because it is imperative to provide adequate isolation between the board supply and the chip supply. It is also imperative to maintain a voltage at the supply terminals that is greater than the minimum voltage required for proper operation.

Figure 20. Power-Supply Decoupling

12.1.2 Thermal Management

For reliability and performance reasons, limit the die temperature to a maximum of 125°C. That is, as an estimate, T_A (ambient temperature) plus device power consumption times θ_JA should not exceed 125°C.

Assuming the conditions in the Power Considerations section and operating at an ambient temperature of 70°C with all outputs loaded, here is an estimate of the LMK00804B junction temperature:

Here are some recommendations for improving heat flow away from the die:

• Use multi-layer boards
• Specify a higher copper thickness for the board
• Increase the number of vias from the top level ground plane under and around the device to internal layers and to the bottom layer with as much copper area flow on each level as possible
• Apply air flow
• Leave unused outputs floating