LMK01801 devices are programmed using 32-bit registers. Each register consists of a 4-bit address field and 23-bit data field. The address field is formed by bits 0 through 3 (LSBs) and the data field is formed by bits 4 through 31 (MSBs). The contents of each register is clocked in MSB first (bit 31), and the LSB (bit 0) last. During programming, the LE signal should be held LOW. The serial data is clocked in on the rising edge of the CLK signal. After the LSB (bit 0) is clocked in the LE signal should be toggled LOW-to-HIGH-to-LOW to latch the contents into the register selected in the address field. It is recommended to program registers in numeric order, for example R0 to R5 and R15 to achieve proper device operation. Figure 7-1 illustrates the serial data timing sequence.