10.4.18 Status Outputs

The device vitals such as input signal quality, smart MUX input selection, PLL loss of lock can be monitored by reading device registers or by monitoring the status pins, STATUS1 and STATUS0. R27 and R28 allow customizing which of the vitals are mapped out to these two pins. Table 7 lists the events that can be mapped to each status pin and which can also be read in the register space. The polarity of the events mapped to the status pins can be selected by programming R15.

A logic-high interrupt output (INTR) can also be selected on either status pins to indicate interrupt status from any of the device vitals listed in R16. To use this feature, R17.0 should be set to 1, R14[4:2] must be set to 0x7, and R14.0 must be set to 1. The interrupts listed in R16 can be combined in an AND or OR functionality by programming R17.1. If interrupts stemming from particular device vitals are to be ignored, the appropriate bits in R14 should be programmed as needed. The contents of R16 can be read back at any time irrespective of whether the INTR function is chosen in either status pins as long as R17.0 = 1 and the contents of R16 are self-cleared once the readback is complete. There also exists a “real-time” interrupt register, R13, which indicate interrupt status from the device vitals irrespective of the state of R17.0. The contents of R13 can be also read back at any time and are self-cleared once the readback is complete.