ZHCSEN4E September 2015 – April 2018 LMK03318
PRODUCTION DATA.
The host (DSP, Microcontroller, FPGA, etc) configures and monitors the LMK03318 through the I2C port. The host reads and writes to a collection of control/status bits called the register map. The device blocks can be controlled and monitored through a specific grouping of bits located within the register file. The host controls and monitors certain device-wide critical parameters directly through register control/status bits. In the absence of the host, the LMK03318 can be configured to operate in pin-mode either from its on-chip ROM or EEPROM depending on the state of HW_SW_CTRL pin. The EEPROM or ROM arrays are automatically copied to the device registers upon powerup. The user has the flexibility to re-write the contents of EEPROM from the SRAM up to a 100 times but the contents of ROM cannot be re-written.
Within the device registers, there are certain bits that have read/write access. Other bits are read-only (an attempt to write to a read only bit will not change the state of the bit). Certain device registers and bits are reserved meaning that they must not be changed from their default reset state. Figure 70 shows interface and control blocks within LMK03318 and the arrows refer to read access from and write access to the different embedded memories (ROM, EEPROM, and SRAM).