ZHCSPJ6A October 2022 – November 2022 LMK04832-SEP
PRODUCTION DATA
When PLL1 is used, an external VCXO is required. The close-in noise performance of this VCXO is critical for good jitter cleaning performance. The OSCout pin is powered on by default and gives a buffered copy of the PLL1 feedback and PLL2 reference input at OSCin. This reference input is typically a low noise VCXO or XO. This output can be used to clock external devices such as microcontrollers, FPGAs, CPLDs, and so forth, before the device is programmed.