6 Pin Configuration and Functions

Figure 6-1 LMK1D1204P: RHD Package 28-Pin VQFN Top View

Table 6-1 Pin Functions

NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
DIFFERENTIAL/SINGLE-ENDED CLOCK INPUT
IN0_P	9	I	Primary: Differential input pair or single-ended input
IN0_N	10	I	Primary: Differential input pair or single-ended input
IN1_P	5	I	Secondary: Differential input pair or single-ended input. Note that INP0, INN0 are used indistinguishably with IN0_P, IN0_N.
IN1_N	6	I
INPUT SELECT
IN_SEL	2	I	Input Selection with an internal 500-kΩ pullup and 320-kΩ pulldown, selects input port. See Table 9-1.
OUTPUT ENABLE
OE0	13	I	Output Enable for channel 0 HIGH (default): Enable output channel 0 LOW: Disable output channel 0 in Hi-Z state
OE1	19	I	Output Enable for channel 1 HIGH (default): Enable output channel 1 LOW: Disable output channel 1 in Hi-Z state
OE2	24	I	Output Enable for channel 2 HIGH (default): Enable output channel 2 LOW: Disable output channel 2 in Hi-Z state
OE3	3	I	Output Enable for channel 3 HIGH (default): Enable output channel 3 LOW: Disable output channel 3 in Hi-Z state
BIAS VOLTAGE OUTPUT
V_{AC_REF0}	11	O	Bias voltage output for capacitive-coupled inputs. If used, TI recommends using a 0.1-µF capacitor to GND on this pin.
V_{AC_REF1}	7	O
DIFFERENTIAL CLOCK OUTPUT
OUT0_P	16	O	Differential LVDS output pair number 0
OUT0_N	17	O	Differential LVDS output pair number 0
OUT1_P	20	O	Differential LVDS output pair number 1
OUT1_N	21	O	Differential LVDS output pair number 1
OUT2_P	22	O	Differential LVDS output pair number 2
OUT2_N	23	O	Differential LVDS output pair number 2
OUT3_P	26	O	Differential LVDS output pair number 3
OUT3_N	27	O	Differential LVDS output pair number 3
SUPPLY VOLTAGE
V_DD	8, 15, 28	P	Device power supply (1.8 V, 2.5 V, or 3.3 V)
GROUND
GND	1, 14	G	Ground
MISC
DAP	DAP	GND	Die Attach Pad. Connect to the printed circuit board (PCB) ground plane for heat dissipation.
NC	4, 12, 18, 25	NC	No Connection. Leave floating

(1) G = Ground, I = Input, O = Output, P = Power