The LMK1D210x inputs can be interfaced with LVDS, LVPECL, HCSL or LVCMOS drivers.

LVDS drivers can be connected to LMK1D210x inputs with DC- and AC-coupling as shown Figure 9-3 and Figure 9-4 (respectively).

Figure 9-3 LVDS Clock Driver Connected to LMK1D210x Input (DC-Coupled)

Figure 9-4 LVDS Clock Driver Connected to LMK1D210x Input (AC-Coupled)

Figure 9-5 shows how to connect LVPECL inputs to the LMK1D210x. The series resistors are required to reduce the LVPECL signal swing if the signal swing is >1.6 V_PP.

Figure 9-5 LVPECL Clock Driver Connected to LMK1D210x Input

Figure 9-6 illustrates how to couple a LVCMOS clock input to the LMK1D210x directly.

Figure 9-6 1.8-V/2.5-V/3.3-V LVCMOS Clock Driver Connected to LMK1D210x Input

Unused inputs can be left floating thus reducing the need for additional components.