The LMK1D210x is a low additive jitter LVDS fan-out buffer that can generate up to four copies of a single input which can be either LVPECL, LVDS, or LVCMOS on each of its banks. Since the device has two banks, this translates to a total of eight pairs of outputs (LMK1D2104). The reference clock frequencies can go up to 2 GHz.

Apart from providing a very low additive jitter and low output skew, the LMK1D210x has a control pin (EN), which controls the enabling/disabling of the output banks.