Enabling Phase Slew Control will constrain the output phase transient or phase hit during hitless switching and holdover exit. Users can select DPLLx_PHS1_EN to enable Phase Slew Control to follow the step limits set in DPLLx_PHS1_THRESH and DPLLx_PHS1_TIMER. When during hitless switching it is desired to transition slowly to tracking the new input phase, enabling phase slew control will remove the phase cancellation or phase build out based on the programmed timer value and step limits. Similarly when the DPLL switches from APLL-only mode or holdover mode to DPLL Lock Acquisition mode, or hitless switching with two inputs are not frequency-locked the phase slew limits would then be applied. When both Phase Cancellation function and Phase Slew Control function are disabled, a phase hit equal to the phase offset between XO and selected input or between the two inputs at the moment of switching will be propagated to the output at a rate determined by the DPLL loop bandwidth. In the case where two inputs are switched but are not frequency-locked Phase Slew Control function can ensure the output smoothly transitions to the new frequency as the rate the defined by the step limits.