Figure 9-3 shows a reference schematic to help implement the LMK5B33414 and its peripheral circuitry. Power filtering examples are given for the core supply pins and independent output supply pins. Single-ended LVCMOS, LVDS, HSDS, LVPECL, and HCSL clock interfacing examples are shown for the clock input and output pins. An external CMOS oscillator drives an AC-coupled voltage divider network as an example to interface the 3.3-V LVCMOS output to meet the input voltage swing specified for the XO input. The XO pin of the LMK5B33414 can accept 3.3-V LVCMOS input. The required external capacitors are placed close to the LMK5B33414 and are shown with the suggested values. External pullup and pulldown resistor options at the logic I/O pins set the default input states. The I²C or SPI pins and other logic I/O pins can be connected to a host device (not shown) to program and control the LMK5B33414 and monitor its status.